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27 | */ |
27 | */ |
28 | 28 | ||
29 | #ifndef __LIBC__ppc32__THREAD_H__ |
29 | #ifndef __LIBC__ppc32__THREAD_H__ |
30 | #define __LIBC__ppc32__THREAD_H__ |
30 | #define __LIBC__ppc32__THREAD_H__ |
31 | 31 | ||
- | 32 | /* I did not find any specification (neither MIPS nor PowerPC), but |
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- | 33 | * as I found it |
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- | 34 | * - it uses Variant II |
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- | 35 | * - TCB is at Address(First TLS Block)+0x7000. |
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- | 36 | * - DTV is at Address(First TLS Block)+0x8000 |
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- | 37 | * - What would happen if the TLS data was larger then 0x7000? |
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- | 38 | * - The linker never accesses DTV directly, has the second definition any |
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- | 39 | * sense? |
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- | 40 | * We will make it this way: |
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- | 41 | * - TCB is at TP-0x7000-sizeof(tcb) |
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- | 42 | * - No assumption about DTV etc., but it will not have a fixed address |
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- | 43 | */ |
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- | 44 | #define PPC_TP_OFFSET 0x7000 |
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- | 45 | ||
32 | typedef struct { |
46 | typedef struct { |
33 | void *pst_data; |
47 | void *pst_data; |
34 | } tcb_t; |
48 | } tcb_t; |
35 | 49 | ||
36 | static inline void __tcb_set(tcb_t *tcb) |
50 | static inline void __tcb_set(tcb_t *tcb) |
37 | { |
51 | { |
- | 52 | void *tp = tcb; |
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- | 53 | tp += PPC_TP_OFFSET + sizeof(tcb_t); |
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- | 54 | ||
- | 55 | asm volatile ( |
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- | 56 | "mr %%r2, %0\n" |
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- | 57 | : |
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- | 58 | : "r" (tp) |
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- | 59 | ); |
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38 | } |
60 | } |
39 | 61 | ||
40 | static inline tcb_t * __tcb_get(void) |
62 | static inline tcb_t * __tcb_get(void) |
41 | { |
63 | { |
- | 64 | void * retval; |
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- | 65 | ||
- | 66 | asm volatile ( |
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- | 67 | "mr %0, %%r2\n" |
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- | 68 | : "=r" (retval) |
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- | 69 | ); |
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- | 70 | ||
- | 71 | return (tcb_t *)(retval - PPC_TP_OFFSET - sizeof(tcb_t)); |
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42 | } |
72 | } |
43 | 73 | ||
44 | #endif |
74 | #endif |