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Line 80... Line 80...
80 
.org trap_table + TT_PRIVILEGED_OPCODE*ENTRY_SIZE
 80 
.org trap_table + TT_PRIVILEGED_OPCODE*ENTRY_SIZE
81 
.global privileged_opcode_tl0
 81 
.global privileged_opcode_tl0
82 
privileged_opcode_tl0:
 82 
privileged_opcode_tl0:
83 
	PREEMPTIBLE_HANDLER privileged_opcode
 83 
	PREEMPTIBLE_HANDLER privileged_opcode
84 
 
 84 
 
- 
 
 85 
/* TT = 0x20, TL = 0, fb_disabled handler */
- 
 
 86 
.org trap_table + TT_FP_DISABLED*ENTRY_SIZE
- 
 
 87 
.global fb_disabled_tl0
- 
 
 88 
fp_disabled_tl0:
- 
 
 89 
	PREEMPTIBLE_HANDLER fp_disabled
- 
 
 90 
 
85 
/* TT = 0x24, TL = 0, clean_window handler */
 91 
/* TT = 0x24, TL = 0, clean_window handler */
86 
.org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE
 92 
.org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE
87 
.global clean_window_handler_tl0
 93 
.global clean_window_tl0
88 
clean_window_handler_tl0:
 94 
clean_window_tl0:
89 
	CLEAN_WINDOW_HANDLER
 95 
	CLEAN_WINDOW_HANDLER
90 
 
 96 
 
91 
/* TT = 0x28, TL = 0, division_by_zero */
 97 
/* TT = 0x28, TL = 0, division_by_zero */
92 
.org trap_table + TT_DIVISION_BY_ZERO*ENTRY_SIZE
 98 
.org trap_table + TT_DIVISION_BY_ZERO*ENTRY_SIZE
93 
.global division_by_zero_tl0
 99 
.global division_by_zero_tl0
Line 487... Line 493...
487 
	wrpr %g0, 1, %tl
 493 
	wrpr %g0, 1, %tl
488 
	PREEMPTIBLE_HANDLER illegal_instruction
 494 
	PREEMPTIBLE_HANDLER illegal_instruction
489 
 
 495 
 
490 
/* TT = 0x24, TL > 0, clean_window handler */
 496 
/* TT = 0x24, TL > 0, clean_window handler */
491 
.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE
 497 
.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE
492 
.global clean_window_handler_tl1
 498 
.global clean_window_tl1
493 
clean_window_handler_tl1:
 499 
clean_window_tl1:
494 
	CLEAN_WINDOW_HANDLER
 500 
	CLEAN_WINDOW_HANDLER
495 
 
 501 
 
496 
/* TT = 0x28, TL > 0, division_by_zero */
 502 
/* TT = 0x28, TL > 0, division_by_zero */
497 
.org trap_table + (TT_DIVISION_BY_ZERO+512)*ENTRY_SIZE
 503 
.org trap_table + (TT_DIVISION_BY_ZERO+512)*ENTRY_SIZE
498 
.global division_by_zero_tl1
 504 
.global division_by_zero_tl1
Line 686... Line 692...
686 
	stx %g1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE]
 692 
	stx %g1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE]
687 
	stx %g2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC]
 693 
	stx %g2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC]
688 
	stx %g3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC]
 694 
	stx %g3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC]
689
695
690 
	wrpr %g0, 0, %tl
 696 
	wrpr %g0, 0, %tl
691 
	wrpr %g0, PSTATE_PRIV_BIT, %pstate
 697 
	wrpr %g0, PSTATE_PRIV_BIT | PSTATE_PEF_BIT, %pstate
692 
	SAVE_GLOBALS
 698 
	SAVE_GLOBALS
693
699
694 
	/*
 700 
	/*
695 
	 * Call the higher-level handler and pass istate as second parameter.
 701 
	 * Call the higher-level handler and pass istate as second parameter.
696 
	 */
 702 
	 */
Line 703... Line 709...
703 
	 */
 709 
	 */
704 
	mov %o0, %i0
 710 
	mov %o0, %i0
705 
.endif
 711 
.endif
706 
 
 712 
 
707 
	RESTORE_GLOBALS
 713 
	RESTORE_GLOBALS
- 
 
 714 
	rdpr %pstate, %l1			! we must preserve the PEF bit
708 
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
 715 
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
709 
	wrpr %g0, 1, %tl
 716 
	wrpr %g0, 1, %tl
710
717
711 
	/*
 718 
	/*
712 
	 * Read TSTATE, TPC and TNPC from saved copy.
 719 
	 * Read TSTATE, TPC and TNPC from saved copy.
Line 714... Line 721...
714 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE], %g1
 721 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE], %g1
715 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC], %g2
 722 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC], %g2
716 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC], %g3
 723 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC], %g3
717 
 
 724 
 
718 
	/*
 725 
	/*
- 
 
 726 
	 * Copy PSTATE.PEF to the in-register copy of TSTATE.
- 
 
 727 
	 */
- 
 
 728 
	and %l1, PSTATE_PEF_BIT, %l1
- 
 
 729 
	sllx %l1, TSTATE_PSTATE_SHIFT, %l1
- 
 
 730 
	sethi %hi(TSTATE_PEF_BIT), %g4
- 
 
 731 
	andn %g1, %g4, %g1
- 
 
 732 
	or %g1, %l1, %g1
- 
 
 733 
 
- 
 
 734 
	/*
719 
	 * Restore TSTATE, TPC and TNPC from saved copies.
 735 
	 * Restore TSTATE, TPC and TNPC from saved copies.
720 
	 */
 736 
	 */
721 
	wrpr %g1, 0, %tstate
 737 
	wrpr %g1, 0, %tstate
722 
	wrpr %g2, 0, %tpc
 738 
	wrpr %g2, 0, %tpc
723 
	wrpr %g3, 0, %tnpc
 739 
	wrpr %g3, 0, %tnpc
724 
 
 740 
 
- 
 
 741 
 
725 
	/*
 742 
	/*
726 
	 * If OTHERWIN is zero, then all the userspace windows have been
 743 
	 * If OTHERWIN is zero, then all the userspace windows have been
727 
	 * spilled to kernel memory (i.e. register window buffer). Moreover,
 744 
	 * spilled to kernel memory (i.e. register window buffer). Moreover,
728 
	 * if the scheduler was called in the meantime, all valid windows
 745 
	 * if the scheduler was called in the meantime, all valid windows
729 
	 * belonging to other threads were spilled by context_restore().
 746 
	 * belonging to other threads were spilled by context_restore().