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Rev 2141 | Rev 2161 | ||
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Line 59... | Line 59... | ||
59 | count_t cnt; |
59 | count_t cnt; |
60 | 60 | ||
61 | ASSERT(as->arch.itsb && as->arch.dtsb); |
61 | ASSERT(as->arch.itsb && as->arch.dtsb); |
62 | 62 | ||
63 | i0 = (page >> MMU_PAGE_WIDTH) & TSB_INDEX_MASK; |
63 | i0 = (page >> MMU_PAGE_WIDTH) & TSB_INDEX_MASK; |
64 | cnt = min(pages * MMU_PAGES_PER_PAGE, ITSB_ENTRY_COUNT); |
64 | if (pages == (count_t) -1 || (pages * 2) > ITSB_ENTRY_COUNT) |
- | 65 | cnt = ITSB_ENTRY_COUNT; |
|
- | 66 | else |
|
- | 67 | cnt = pages * 2; |
|
65 | 68 | ||
66 | for (i = 0; i < cnt; i++) { |
69 | for (i = 0; i < cnt; i++) { |
67 | as->arch.itsb[(i0 + i) & (ITSB_ENTRY_COUNT - 1)].tag.invalid = |
70 | as->arch.itsb[(i0 + i) & (ITSB_ENTRY_COUNT - 1)].tag.invalid = |
68 | true; |
71 | true; |
69 | as->arch.dtsb[(i0 + i) & (DTSB_ENTRY_COUNT - 1)].tag.invalid = |
72 | as->arch.dtsb[(i0 + i) & (DTSB_ENTRY_COUNT - 1)].tag.invalid = |
Line 155... | Line 158... | ||
155 | tsb->data.w = ro ? false : t->w; |
158 | tsb->data.w = ro ? false : t->w; |
156 | tsb->data.v = t->p; |
159 | tsb->data.v = t->p; |
157 | 160 | ||
158 | write_barrier(); |
161 | write_barrier(); |
159 | 162 | ||
160 | tsb->tag.invalid = true; /* mark the entry as valid */ |
163 | tsb->tag.invalid = false; /* mark the entry as valid */ |
161 | } |
164 | } |
162 | 165 | ||
163 | /** @} |
166 | /** @} |
164 | */ |
167 | */ |