WebSVN – HelenOS – Diff – //trunk/kernel/arch/sparc64/src/mm/tlb.c

 #include <arch/mm/tsb.h>
 #endif
 static void dtlb_pte_copy(pte_t *t, bool ro);
 static void itlb_pte_copy(pte_t *t);
-static void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const char *str);
+static void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const
+    char *str);
-static void do_fast_data_access_mmu_miss_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str);
+static void do_fast_data_access_mmu_miss_fault(istate_t *istate,
+     tlb_tag_access_reg_t tag, const char *str);
-static void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str);
+static void do_fast_data_access_protection_fault(istate_t *istate,
+    tlb_tag_access_reg_t tag, const char *str);
 char *context_encoding[] = {
     "Primary",
     "Secondary",
     "Nucleus",
  * @param frame Physical frame address.
  * @param pagesize Page size.
  * @param locked True for permanent mappings, false otherwise.
  * @param cacheable True if the mapping is cacheable, false otherwise.
  */
-void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool locked, bool cacheable)
+void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool
+    locked, bool cacheable)
+{
     tlb_tag_access_reg_t tag;
     tlb_data_t data;
     page_address_t pg;
     frame_address_t fr;
+}
 /** Copy PTE to TLB.
+ *
  * @param t Page Table Entry to be copied.
- * @param ro If true, the entry will be created read-only, regardless of its w field.
+ * @param ro If true, the entry will be created read-only, regardless of its w
+ *  field.
  */
 void dtlb_pte_copy(pte_t *t, bool ro)
+{
     tlb_tag_access_reg_t tag;
     tlb_data_t data;
         itsb_pte_copy(t);
 #endif
         page_table_unlock(AS, true);
     } else {
         /*
-         * Forward the page fault to the address space page fault handler.
+         * Forward the page fault to the address space page fault
+         * handler.
          */
         page_table_unlock(AS, true);
         if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) {
-            do_fast_instruction_access_mmu_miss_fault(istate, __FUNCTION__);
+            do_fast_instruction_access_mmu_miss_fault(istate,
+                __FUNCTION__);
+        }
+    }
+}
 /** DTLB miss handler.
+ *
- * Note that some faults (e.g. kernel faults) were already resolved
+ * Note that some faults (e.g. kernel faults) were already resolved by the
- * by the low-level, assembly language part of the fast_data_access_mmu_miss
+ * low-level, assembly language part of the fast_data_access_mmu_miss handler.
- * handler.
  */
 void fast_data_access_mmu_miss(int n, istate_t *istate)
+{
     tlb_tag_access_reg_t tag;
     uintptr_t va;
     va = tag.vpn << PAGE_WIDTH;
     if (tag.context == ASID_KERNEL) {
         if (!tag.vpn) {
             /* NULL access in kernel */
-            do_fast_data_access_mmu_miss_fault(istate, tag, __FUNCTION__);
+            do_fast_data_access_mmu_miss_fault(istate, tag,
+                __FUNCTION__);
+        }
-        do_fast_data_access_mmu_miss_fault(istate, tag, "Unexpected kernel page fault.");
+        do_fast_data_access_mmu_miss_fault(istate, tag, "Unexpected "
+            "kernel page fault.");
+    }
     page_table_lock(AS, true);
     t = page_mapping_find(AS, va);
     if (t) {
         /*
          * Forward the page fault to the address space page fault handler.
          */
         page_table_unlock(AS, true);
         if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) {
-            do_fast_data_access_mmu_miss_fault(istate, tag, __FUNCTION__);
+            do_fast_data_access_mmu_miss_fault(istate, tag,
+                __FUNCTION__);
+        }
+    }
+}
 /** DTLB protection fault handler. */
     page_table_lock(AS, true);
     t = page_mapping_find(AS, va);
     if (t && PTE_WRITABLE(t)) {
         /*
-         * The mapping was found in the software page hash table and is writable.
+         * The mapping was found in the software page hash table and is
-         * Demap the old mapping and insert an updated mapping into DTLB.
+         * writable. Demap the old mapping and insert an updated mapping
+         * into DTLB.
          */
         t->a = true;
         t->d = true;
         dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_SECONDARY, va);
         dtlb_pte_copy(t, false);
         dtsb_pte_copy(t, false);
 #endif
         page_table_unlock(AS, true);
     } else {
         /*
-         * Forward the page fault to the address space page fault handler.
+         * Forward the page fault to the address space page fault
+         * handler.
          */
         page_table_unlock(AS, true);
         if (as_page_fault(va, PF_ACCESS_WRITE, istate) == AS_PF_FAULT) {
-            do_fast_data_access_protection_fault(istate, tag, __FUNCTION__);
+            do_fast_data_access_protection_fault(istate, tag,
+                __FUNCTION__);
+        }
+    }
+}
 /** Print contents of both TLBs. */
     printf("I-TLB contents:\n");
     for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
         d.value = itlb_data_access_read(i);
         t.value = itlb_tag_read_read(i);
-        printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",
+        printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, "
+            "ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, "
+            "cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", i, t.vpn,
-            i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
+            t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag,
+            d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
+    }
     printf("D-TLB contents:\n");
     for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
         d.value = dtlb_data_access_read(i);
         t.value = dtlb_tag_read_read(i);
-        printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",
+        printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, "
+            "ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, "
+            "cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", i, t.vpn,
-            i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
+            t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag,
+            d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
+    }
+}
-void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const char *str)
+void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const char
+    *str)
+{
     fault_if_from_uspace(istate, "%s\n", str);
     dump_istate(istate);
     panic("%s\n", str);
+}
-void do_fast_data_access_mmu_miss_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str)
+void do_fast_data_access_mmu_miss_fault(istate_t *istate, tlb_tag_access_reg_t
+    tag, const char *str)
+{
     uintptr_t va;
     va = tag.vpn << PAGE_WIDTH;
-    fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context);
+    fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va,
+        tag.context);
     dump_istate(istate);
     printf("Faulting page: %p, ASID=%d\n", va, tag.context);
     panic("%s\n", str);
+}
-void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str)
+void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t
+    tag, const char *str)
+{
     uintptr_t va;
     va = tag.vpn << PAGE_WIDTH;
-    fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context);
+    fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va,
+        tag.context);
     printf("Faulting page: %p, ASID=%d\n", va, tag.context);
     dump_istate(istate);
     panic("%s\n", str);
+}
     uintptr_t sfar;
     sfsr.value = dtlb_sfsr_read();
     sfar = dtlb_sfar_read();
-    printf("DTLB SFSR: asi=%#x, ft=%#x, e=%d, ct=%d, pr=%d, w=%d, ow=%d, fv=%d\n",
+    printf("DTLB SFSR: asi=%#x, ft=%#x, e=%d, ct=%d, pr=%d, w=%d, ow=%d, "
-        sfsr.asi, sfsr.ft, sfsr.e, sfsr.ct, sfsr.pr, sfsr.w, sfsr.ow, sfsr.fv);
+        "fv=%d\n", sfsr.asi, sfsr.ft, sfsr.e, sfsr.ct, sfsr.pr, sfsr.w,
+        sfsr.ow, sfsr.fv);
     printf("DTLB SFAR: address=%p\n", sfar);
     dtlb_sfsr_write(0);
+}
+        }
+    }
+}
-/** Invalidate all ITLB and DTLB entries that belong to specified ASID (Context).
+/** Invalidate all ITLB and DTLB entries that belong to specified ASID
+ * (Context).
+ *
  * @param asid Address Space ID.
  */
 void tlb_invalidate_asid(asid_t asid)
+{
     mmu_primary_context_write(pc_save.v);
     nucleus_leave();
+}
-/** Invalidate all ITLB and DTLB entries for specified page range in specified address space.
+/** Invalidate all ITLB and DTLB entries for specified page range in specified
+ * address space.
+ *
  * @param asid Address Space ID.
  * @param page First page which to sweep out from ITLB and DTLB.
  * @param cnt Number of ITLB and DTLB entries to invalidate.
  */
     ctx.v = pc_save.v = mmu_primary_context_read();
     ctx.context = asid;
     mmu_primary_context_write(ctx.v);
     for (i = 0; i < cnt; i++) {
-        itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i * PAGE_SIZE);
+        itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i *
+            PAGE_SIZE);
-        dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i * PAGE_SIZE);
+        dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i *
+            PAGE_SIZE);
+    }
     mmu_primary_context_write(pc_save.v);
     nucleus_leave();

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(root)//trunk/kernel/arch/sparc64/src/mm/tlb.c – Rev 2009 → 2048