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#ifndef __sparc64_MMU_TRAP_H__
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#ifndef __sparc64_MMU_TRAP_H__
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#define __sparc64_MMU_TRAP_H__
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#define __sparc64_MMU_TRAP_H__
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#include <arch/stack.h>
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#include <arch/stack.h>
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#include <arch/regdef.h>
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#include <arch/mm/tlb.h>
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#include <arch/mm/tlb.h>
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#include <arch/mm/mmu.h>
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#include <arch/mm/mmu.h>
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#include <arch/mm/tte.h>
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#include <arch/mm/tte.h>
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#define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64
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#define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64
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    retry  
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    retry  
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.endm
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.endm
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.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER
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.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER
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    /*
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    /*
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     * First, try to refill TLB from TSB.
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     */
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    ! TODO
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    /*
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     * First, test if it is the portion of the kernel address space
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     * Second, test if it is the portion of the kernel address space
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     * which is faulting. If that is the case, immediately create
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     * which is faulting. If that is the case, immediately create
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     * identity mapping for that page in DTLB. VPN 0 is excluded from
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     * identity mapping for that page in DTLB. VPN 0 is excluded from
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     * this treatment.
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     * this treatment.
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     *
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     *
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     * Note that branch-delay slots are used in order to save space.
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     * Note that branch-delay slots are used in order to save space.
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     */
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     */
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0:
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    mov VA_DMMU_TAG_ACCESS, %g1
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    mov VA_DMMU_TAG_ACCESS, %g1
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    ldxa [%g1] ASI_DMMU, %g1            ! read the faulting Context and VPN
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    ldxa [%g1] ASI_DMMU, %g1            ! read the faulting Context and VPN
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    set TLB_TAG_ACCESS_CONTEXT_MASK, %g2
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    set TLB_TAG_ACCESS_CONTEXT_MASK, %g2
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    andcc %g1, %g2, %g3             ! get Context
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    andcc %g1, %g2, %g3             ! get Context
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    bnz 0f                      ! Context is non-zero
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    bnz 0f                      ! Context is non-zero
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    andncc %g1, %g2, %g3                ! get page address into %g3
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    andncc %g1, %g2, %g3                ! get page address into %g3
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    bz 0f                       ! page address is zero
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    bz 0f                       ! page address is zero
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    /*
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     * Create and insert the identity-mapped entry for
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     * the faulting kernel page.
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     */
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    or %g3, (TTE_CP|TTE_P|TTE_W), %g2       ! 8K pages are the default (encoded as 0)
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    or %g3, (TTE_CP|TTE_P|TTE_W), %g2       ! 8K pages are the default (encoded as 0)
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        set 1, %g3
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        set 1, %g3
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        sllx %g3, TTE_V_SHIFT, %g3
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        sllx %g3, TTE_V_SHIFT, %g3
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        or %g2, %g3, %g2
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        or %g2, %g3, %g2
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    stxa %g2, [%g0] ASI_DTLB_DATA_IN_REG        ! identity map the kernel page
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    stxa %g2, [%g0] ASI_DTLB_DATA_IN_REG        ! identity map the kernel page
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    retry
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    retry
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    /*
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     * Third, catch and handle special cases when the trap is caused by
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     * some register window trap handler.
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     */
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0:
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    ! TODO
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0:
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0:
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    save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp                         
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    wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
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    PREEMPTIBLE_HANDLER fast_data_access_mmu_miss
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    PREEMPTIBLE_HANDLER fast_data_access_mmu_miss
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.endm
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.endm
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.macro FAST_DATA_ACCESS_PROTECTION_HANDLER
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.macro FAST_DATA_ACCESS_PROTECTION_HANDLER
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    save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
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    save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp