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38 | #define __sparc64_TRAP_INTERRUPT_H__ |
38 | #define __sparc64_TRAP_INTERRUPT_H__ |
39 | 39 | ||
40 | #include <arch/trap/trap_table.h> |
40 | #include <arch/trap/trap_table.h> |
41 | #include <arch/stack.h> |
41 | #include <arch/stack.h> |
42 | 42 | ||
- | 43 | /* Interrupt ASI registers. */ |
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- | 44 | #define ASI_UDB_INTR_W 0x77 |
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- | 45 | #define ASI_INTR_DISPATCH_STATUS 0x48 |
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- | 46 | #define ASI_UDB_INTR_R 0x7f |
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- | 47 | #define ASI_INTR_RECEIVE 0x49 |
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- | 48 | ||
- | 49 | /* VA's used with ASI_UDB_INTR_W register. */ |
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- | 50 | #define ASI_UDB_INTR_W_DATA_0 0x40 |
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- | 51 | #define ASI_UDB_INTR_W_DATA_1 0x50 |
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- | 52 | #define ASI_UDB_INTR_W_DATA_2 0x60 |
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- | 53 | ||
- | 54 | /* VA's used with ASI_UDB_INTR_R register. */ |
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- | 55 | #define ASI_UDB_INTR_R_DATA_0 0x40 |
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- | 56 | #define ASI_UDB_INTR_R_DATA_1 0x50 |
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- | 57 | #define ASI_UDB_INTR_R_DATA_2 0x60 |
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- | 58 | ||
43 | #define TT_INTERRUPT_LEVEL_1 0x41 |
59 | #define TT_INTERRUPT_LEVEL_1 0x41 |
44 | #define TT_INTERRUPT_LEVEL_2 0x42 |
60 | #define TT_INTERRUPT_LEVEL_2 0x42 |
45 | #define TT_INTERRUPT_LEVEL_3 0x43 |
61 | #define TT_INTERRUPT_LEVEL_3 0x43 |
46 | #define TT_INTERRUPT_LEVEL_4 0x44 |
62 | #define TT_INTERRUPT_LEVEL_4 0x44 |
47 | #define TT_INTERRUPT_LEVEL_5 0x45 |
63 | #define TT_INTERRUPT_LEVEL_5 0x45 |
Line 68... | Line 84... | ||
68 | mov %fp, %o1 |
84 | mov %fp, %o1 |
69 | PREEMPTIBLE_HANDLER exc_dispatch |
85 | PREEMPTIBLE_HANDLER exc_dispatch |
70 | .endm |
86 | .endm |
71 | 87 | ||
72 | .macro INTERRUPT_VECTOR_TRAP_HANDLER |
88 | .macro INTERRUPT_VECTOR_TRAP_HANDLER |
- | 89 | save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp |
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- | 90 | SIMPLE_HANDLER interrupt |
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- | 91 | restore |
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73 | retry |
92 | retry |
74 | .endm |
93 | .endm |
75 | #endif /* __ASM__ */ |
94 | #endif /* __ASM__ */ |
76 | 95 | ||
- | 96 | #ifndef __ASM__ |
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- | 97 | extern void interrupt(void); |
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- | 98 | #endif /* !def __ASM__ */ |
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- | 99 | ||
77 | #endif |
100 | #endif |
78 | 101 | ||
79 | /** @} |
102 | /** @} |
80 | */ |
103 | */ |