WebSVN – HelenOS – Diff – //trunk/kernel/arch/ia64/src/mm/tlb.c



    switch (b) {
    case 0: /*cnt 1-3*/
        ps = PAGE_WIDTH;
        break;
    case 1: /*cnt 4-15*/
 
        ps = PAGE_WIDTH+2;
        va &= ~((1<<ps)-1);
        break;
    case 2: /*cnt 16-63*/
 
        ps = PAGE_WIDTH+4;
        va &= ~((1<<ps)-1);
        break;
    case 3: /*cnt 64-255*/
 
        ps = PAGE_WIDTH+6;
        va &= ~((1<<ps)-1);
        break;
    case 4: /*cnt 256-1023*/
 
        ps = PAGE_WIDTH+8;
        va &= ~((1<<ps)-1);
        break;
    case 5: /*cnt 1024-4095*/
 
        ps = PAGE_WIDTH+10;
        va &= ~((1<<ps)-1);
        break;
    case 6: /*cnt 4096-16383*/
 
        ps = PAGE_WIDTH+12;
        va &= ~((1<<ps)-1);
        break;
    case 7: /*cnt 16384-65535*/
    case 8: /*cnt 65536-(256K-1)*/
 
        ps = PAGE_WIDTH+14;
        va &= ~((1<<ps)-1);
        break;
    default:
 
        ps=PAGE_WIDTH+18;
        va&=~((1<<ps)-1);
        break;
    }
 
    for(; va<(page+cnt*(PAGE_SIZE)); va += (1<<ps)) {
        asm volatile (
            "ptc.l %0,%1;;"
            :
            : "r" (va), "r" (ps<<2)

    if((va >= IO_OFFSET ) && (va < IO_OFFSET + (1<<IO_PAGE_WIDTH)))
        if(TASK){
           
            uint64_t io_page=(va &  ((1<<IO_PAGE_WIDTH)-1)) >> (USPACE_IO_PAGE_WIDTH);
            if(is_io_page_accessible(io_page)){
 
 
                uint64_t page,frame;
 
                page = IO_OFFSET + (1 << USPACE_IO_PAGE_WIDTH) * io_page;
                frame = IO_FRAME_BASE + (1 << USPACE_IO_PAGE_WIDTH) * io_page;
 

                entry.ma = MA_UNCACHEABLE;     
                entry.a = true;         /* already accessed */
                entry.d = true;         /* already dirty */
                entry.pl = PL_USER;
                entry.ar = AR_READ | AR_WRITE;
                entry.ppn = frame >> PPN_SHIFT;
                entry.ps = USPACE_IO_PAGE_WIDTH;
   
                dtc_mapping_insert(page, TASK->as->asid, entry);
                return 1;
            }else {
                fault_if_from_uspace(istate,"IO access fault at %p",va);
                return 0;
            }      

Rev 3635	Rev 3763
Line 133...	Line 133...
133	switch (b) {	133	switch (b) {
134	case 0: /cnt 1-3/	134	case 0: /cnt 1-3/
135	ps = PAGE_WIDTH;	135	ps = PAGE_WIDTH;
136	break;	136	break;
137	case 1: /cnt 4-15/	137	case 1: /cnt 4-15/
138	/cnt=((cnt-1)/4)+1;/	-
139	ps = PAGE_WIDTH+2;	138	ps = PAGE_WIDTH+2;
140	va &= ~((1<<ps)-1);	139	va &= ~((1<<ps)-1);
141	break;	140	break;
142	case 2: /cnt 16-63/	141	case 2: /cnt 16-63/
143	/cnt=((cnt-1)/16)+1;/	-
144	ps = PAGE_WIDTH+4;	142	ps = PAGE_WIDTH+4;
145	va &= ~((1<<ps)-1);	143	va &= ~((1<<ps)-1);
146	break;	144	break;
147	case 3: /cnt 64-255/	145	case 3: /cnt 64-255/
148	/cnt=((cnt-1)/64)+1;/	-
149	ps = PAGE_WIDTH+6;	146	ps = PAGE_WIDTH+6;
150	va &= ~((1<<ps)-1);	147	va &= ~((1<<ps)-1);
151	break;	148	break;
152	case 4: /cnt 256-1023/	149	case 4: /cnt 256-1023/
153	/cnt=((cnt-1)/256)+1;/	-
154	ps = PAGE_WIDTH+8;	150	ps = PAGE_WIDTH+8;
155	va &= ~((1<<ps)-1);	151	va &= ~((1<<ps)-1);
156	break;	152	break;
157	case 5: /cnt 1024-4095/	153	case 5: /cnt 1024-4095/
158	/cnt=((cnt-1)/1024)+1;/	-
159	ps = PAGE_WIDTH+10;	154	ps = PAGE_WIDTH+10;
160	va &= ~((1<<ps)-1);	155	va &= ~((1<<ps)-1);
161	break;	156	break;
162	case 6: /cnt 4096-16383/	157	case 6: /cnt 4096-16383/
163	/cnt=((cnt-1)/4096)+1;/	-
164	ps = PAGE_WIDTH+12;	158	ps = PAGE_WIDTH+12;
165	va &= ~((1<<ps)-1);	159	va &= ~((1<<ps)-1);
166	break;	160	break;
167	case 7: /cnt 16384-65535/	161	case 7: /cnt 16384-65535/
168	case 8: /cnt 65536-(256K-1)/	162	case 8: /cnt 65536-(256K-1)/
169	/cnt=((cnt-1)/16384)+1;/	-
170	ps = PAGE_WIDTH+14;	163	ps = PAGE_WIDTH+14;
171	va &= ~((1<<ps)-1);	164	va &= ~((1<<ps)-1);
172	break;	165	break;
173	default:	166	default:
174	/cnt=((cnt-1)/(1638416))+1;*/	-
175	ps=PAGE_WIDTH+18;	167	ps=PAGE_WIDTH+18;
176	va&=~((1<<ps)-1);	168	va&=~((1<<ps)-1);
177	break;	169	break;
178	}	170	}
179	/cnt+=(page!=va);/	-
180	for(; va<(page+cnt*(PAGE_SIZE)); va += (1<<ps)) {	171	for(; va<(page+cnt*(PAGE_SIZE)); va += (1<<ps)) {
181	asm volatile (	172	asm volatile (
182	"ptc.l %0,%1;;"	173	"ptc.l %0,%1;;"
183	:	174	:
184	: "r" (va), "r" (ps<<2)	175	: "r" (va), "r" (ps<<2)
Line 500...	Line 491...
500	if((va >= IO_OFFSET ) && (va < IO_OFFSET + (1<<IO_PAGE_WIDTH)))	491	if((va >= IO_OFFSET ) && (va < IO_OFFSET + (1<<IO_PAGE_WIDTH)))
501	if(TASK){	492	if(TASK){
502		493
503	uint64_t io_page=(va & ((1<<IO_PAGE_WIDTH)-1)) >> (USPACE_IO_PAGE_WIDTH);	494	uint64_t io_page=(va & ((1<<IO_PAGE_WIDTH)-1)) >> (USPACE_IO_PAGE_WIDTH);
504	if(is_io_page_accessible(io_page)){	495	if(is_io_page_accessible(io_page)){
505	//printf("Insert %llX\n",va);	-
506		-
507	uint64_t page,frame;	496	uint64_t page,frame;
508		497
509	page = IO_OFFSET + (1 << USPACE_IO_PAGE_WIDTH) * io_page;	498	page = IO_OFFSET + (1 << USPACE_IO_PAGE_WIDTH) * io_page;
510	frame = IO_FRAME_BASE + (1 << USPACE_IO_PAGE_WIDTH) * io_page;	499	frame = IO_FRAME_BASE + (1 << USPACE_IO_PAGE_WIDTH) * io_page;
511		500
Line 519...	Line 508...
519	entry.ma = MA_UNCACHEABLE;	508	entry.ma = MA_UNCACHEABLE;
520	entry.a = true; /* already accessed */	509	entry.a = true; /* already accessed */
521	entry.d = true; /* already dirty */	510	entry.d = true; /* already dirty */
522	entry.pl = PL_USER;	511	entry.pl = PL_USER;
523	entry.ar = AR_READ \| AR_WRITE;	512	entry.ar = AR_READ \| AR_WRITE;
524	entry.ppn = frame >> PPN_SHIFT; //MUSIM spocitat frame	513	entry.ppn = frame >> PPN_SHIFT;
525	entry.ps = USPACE_IO_PAGE_WIDTH;	514	entry.ps = USPACE_IO_PAGE_WIDTH;
526		515
527	dtc_mapping_insert(page, TASK->as->asid, entry); //Musim zjistit ASID	516	dtc_mapping_insert(page, TASK->as->asid, entry);
528	return 1;	517	return 1;
529	}else {	518	}else {
530	fault_if_from_uspace(istate,"IO access fault at %p",va);	519	fault_if_from_uspace(istate,"IO access fault at %p",va);
531	return 0;	520	return 0;
532	}	521	}

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(root)//trunk/kernel/arch/ia64/src/mm/tlb.c – Rev 3635 → 3763