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| Rev 3135 | Rev 4018 | ||
|---|---|---|---|
| Line 61... | Line 61... | ||
| 61 | 61 | ||
| 62 | /** Switches to kernel stack and saves all registers there. |
62 | /** Switches to kernel stack and saves all registers there. |
| 63 | * |
63 | * |
| 64 | * Temporary exception stack is used to save a few registers |
64 | * Temporary exception stack is used to save a few registers |
| 65 | * before stack switch takes place. |
65 | * before stack switch takes place. |
| - | 66 | * |
|
| 66 | */ |
67 | */ |
| 67 | inline static void setup_stack_and_save_regs() |
68 | inline static void setup_stack_and_save_regs() |
| 68 | { |
69 | { |
| 69 | asm volatile( |
70 | asm volatile ( |
| 70 | "ldr r13, =exc_stack \n" |
71 | "ldr r13, =exc_stack\n" |
| 71 | "stmfd r13!, {r0} \n" |
72 | "stmfd r13!, {r0}\n" |
| 72 | "mrs r0, spsr \n" |
73 | "mrs r0, spsr\n" |
| 73 | "and r0, r0, #0x1f \n" |
74 | "and r0, r0, #0x1f\n" |
| 74 | "cmp r0, #0x10 \n" |
75 | "cmp r0, #0x10\n" |
| 75 | "bne 1f \n" |
76 | "bne 1f\n" |
| 76 | 77 | ||
| 77 | /* prev mode was usermode */ |
78 | /* prev mode was usermode */ |
| 78 | "ldmfd r13!, {r0} \n" |
79 | "ldmfd r13!, {r0}\n" |
| 79 | "ldr r13, =supervisor_sp \n" |
80 | "ldr r13, =supervisor_sp\n" |
| 80 | "ldr r13, [r13] \n" |
81 | "ldr r13, [r13]\n" |
| 81 | "stmfd r13!, {lr} \n" |
82 | "stmfd r13!, {lr}\n" |
| 82 | "stmfd r13!, {r0-r12} \n" |
83 | "stmfd r13!, {r0-r12}\n" |
| 83 | "stmfd r13!, {r13, lr}^ \n" |
84 | "stmfd r13!, {r13, lr}^\n" |
| 84 | "mrs r0, spsr \n" |
85 | "mrs r0, spsr\n" |
| 85 | "stmfd r13!, {r0} \n" |
86 | "stmfd r13!, {r0}\n" |
| 86 | "b 2f \n" |
87 | "b 2f\n" |
| 87 | 88 | ||
| 88 | /* mode was not usermode */ |
89 | /* mode was not usermode */ |
| 89 | "1:\n" |
90 | "1:\n" |
| 90 | "stmfd r13!, {r1, r2, r3} \n" |
91 | "stmfd r13!, {r1, r2, r3}\n" |
| 91 | "mrs r1, cpsr \n" |
92 | "mrs r1, cpsr\n" |
| 92 | "mov r2, lr \n" |
93 | "mov r2, lr\n" |
| 93 | "bic r1, r1, #0x1f \n" |
94 | "bic r1, r1, #0x1f\n" |
| 94 | "orr r1, r1, r0 \n" |
95 | "orr r1, r1, r0\n" |
| 95 | "mrs r0, cpsr \n" |
96 | "mrs r0, cpsr\n" |
| 96 | "msr cpsr_c, r1 \n" |
97 | "msr cpsr_c, r1\n" |
| 97 | 98 | ||
| 98 | "mov r3, r13 \n" |
99 | "mov r3, r13\n" |
| 99 | "stmfd r13!, {r2} \n" |
100 | "stmfd r13!, {r2}\n" |
| 100 | "mov r2, lr \n" |
101 | "mov r2, lr\n" |
| 101 | "stmfd r13!, {r4-r12} \n" |
102 | "stmfd r13!, {r4-r12}\n" |
| 102 | "mov r1, r13 \n" |
103 | "mov r1, r13\n" |
| - | 104 | ||
| 103 | /* the following two lines are for debugging */ |
105 | /* the following two lines are for debugging */ |
| 104 | "mov sp, #0 \n" |
106 | "mov sp, #0\n" |
| 105 | "mov lr, #0 \n" |
107 | "mov lr, #0\n" |
| 106 | "msr cpsr_c, r0 \n" |
108 | "msr cpsr_c, r0\n" |
| 107 | 109 | ||
| 108 | "ldmfd r13!, {r4, r5, r6, r7} \n" |
110 | "ldmfd r13!, {r4, r5, r6, r7}\n" |
| 109 | "stmfd r1!, {r4, r5, r6} \n" |
111 | "stmfd r1!, {r4, r5, r6}\n" |
| 110 | "stmfd r1!, {r7} \n" |
112 | "stmfd r1!, {r7}\n" |
| 111 | "stmfd r1!, {r2} \n" |
113 | "stmfd r1!, {r2}\n" |
| 112 | "stmfd r1!, {r3} \n" |
114 | "stmfd r1!, {r3}\n" |
| 113 | "mrs r0, spsr \n" |
115 | "mrs r0, spsr\n" |
| 114 | "stmfd r1!, {r0} \n" |
116 | "stmfd r1!, {r0}\n" |
| 115 | "mov r13, r1 \n" |
117 | "mov r13, r1\n" |
| - | 118 | ||
| 116 | "2:\n" |
119 | "2:\n" |
| 117 | ); |
120 | ); |
| 118 | } |
121 | } |
| 119 | 122 | ||
| 120 | /** Returns from exception mode. |
123 | /** Returns from exception mode. |
| 121 | * |
124 | * |
| Line 187... | Line 190... | ||
| 187 | "ldmfd sp!, {r0-r3} \n" |
190 | "ldmfd sp!, {r0-r3} \n" |
| 188 | ); |
191 | ); |
| 189 | } |
192 | } |
| 190 | 193 | ||
| 191 | /** Calls exception dispatch routine. */ |
194 | /** Calls exception dispatch routine. */ |
| 192 | #define CALL_EXC_DISPATCH(exception) \ |
195 | #define CALL_EXC_DISPATCH(exception) \ |
| - | 196 | asm volatile ( \ |
|
| 193 | asm("mov r0, %0" : : "i" (exception)); \ |
197 | "mov r0, %[exc]\n" \ |
| 194 | asm("mov r1, r13"); \ |
198 | "mov r1, r13\n" \ |
| 195 | asm("bl exc_dispatch"); |
199 | "bl exc_dispatch\n" \ |
| - | 200 | :: [exc] "i" (exception) \ |
|
| - | 201 | );\ |
|
| 196 | 202 | ||
| 197 | /** General exception handler. |
203 | /** General exception handler. |
| 198 | * |
204 | * |
| 199 | * Stores registers, dispatches the exception, |
205 | * Stores registers, dispatches the exception, |
| 200 | * and finally restores registers and returns from exception processing. |
206 | * and finally restores registers and returns from exception processing. |
| 201 | * |
207 | * |
| 202 | * @param exception Exception number. |
208 | * @param exception Exception number. |
| 203 | */ |
209 | */ |
| 204 | #define PROCESS_EXCEPTION(exception) \ |
210 | #define PROCESS_EXCEPTION(exception) \ |
| 205 | setup_stack_and_save_regs(); \ |
211 | setup_stack_and_save_regs(); \ |
| 206 | CALL_EXC_DISPATCH(exception) \ |
212 | CALL_EXC_DISPATCH(exception) \ |
| 207 | load_regs(); |
213 | load_regs(); |
| 208 | 214 | ||
| 209 | /** Updates specified exception vector to jump to given handler. |
215 | /** Updates specified exception vector to jump to given handler. |
| 210 | * |
216 | * |
| 211 | * Addresses of handlers are stored in memory following exception vectors. |
217 | * Addresses of handlers are stored in memory following exception vectors. |
| Line 331... | Line 337... | ||
| 331 | /** Activates use of high exception vectors addresses. */ |
337 | /** Activates use of high exception vectors addresses. */ |
| 332 | static void high_vectors(void) |
338 | static void high_vectors(void) |
| 333 | { |
339 | { |
| 334 | uint32_t control_reg; |
340 | uint32_t control_reg; |
| 335 | 341 | ||
| - | 342 | asm volatile ( |
|
| - | 343 | "mrc p15, 0, %[control_reg], c1, c1" |
|
| 336 | asm volatile("mrc p15, 0, %0, c1, c1" : "=r" (control_reg)); |
344 | : [control_reg] "=r" (control_reg) |
| - | 345 | ); |
|
| 337 | 346 | ||
| 338 | /* switch on the high vectors bit */ |
347 | /* switch on the high vectors bit */ |
| 339 | control_reg |= CP15_R1_HIGH_VECTORS_BIT; |
348 | control_reg |= CP15_R1_HIGH_VECTORS_BIT; |
| 340 | 349 | ||
| - | 350 | asm volatile ( |
|
| - | 351 | "mcr p15, 0, %[control_reg], c1, c1" |
|
| 341 | asm volatile("mcr p15, 0, %0, c1, c1" : : "r" (control_reg)); |
352 | :: [control_reg] "r" (control_reg) |
| - | 353 | ); |
|
| 342 | } |
354 | } |
| 343 | #endif |
355 | #endif |
| 344 | 356 | ||
| 345 | /** Initializes exception handling. |
357 | /** Initializes exception handling. |
| 346 | * |
358 | * |
| 347 | * Installs low-level exception handlers and then registers |
359 | * Installs low-level exception handlers and then registers |
| 348 | * exceptions and their handlers to kernel exception dispatcher. |
360 | * exceptions and their handlers to kernel exception dispatcher. |
| 349 | */ |
361 | */ |
| 350 | void exception_init(void) |
362 | void exception_init(void) |
| 351 | { |
363 | { |