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| 258 | #define GEN_WRITE_REG(reg) static inline void write_ ##reg (unative_t regn) \ |
258 | #define GEN_WRITE_REG(reg) static inline void write_ ##reg (unative_t regn) \ |
| 259 | { \ |
259 | { \ |
| 260 | __asm__ volatile ("movq %0, %%" #reg : : "r" (regn)); \ |
260 | __asm__ volatile ("movq %0, %%" #reg : : "r" (regn)); \ |
| 261 | } |
261 | } |
| 262 | 262 | ||
| 263 | GEN_READ_REG(cr0); |
263 | GEN_READ_REG(cr0) |
| 264 | GEN_READ_REG(cr2); |
264 | GEN_READ_REG(cr2) |
| 265 | GEN_READ_REG(cr3); |
265 | GEN_READ_REG(cr3) |
| 266 | GEN_WRITE_REG(cr3); |
266 | GEN_WRITE_REG(cr3) |
| 267 | 267 | ||
| 268 | GEN_READ_REG(dr0); |
268 | GEN_READ_REG(dr0) |
| 269 | GEN_READ_REG(dr1); |
269 | GEN_READ_REG(dr1) |
| 270 | GEN_READ_REG(dr2); |
270 | GEN_READ_REG(dr2) |
| 271 | GEN_READ_REG(dr3); |
271 | GEN_READ_REG(dr3) |
| 272 | GEN_READ_REG(dr6); |
272 | GEN_READ_REG(dr6) |
| 273 | GEN_READ_REG(dr7); |
273 | GEN_READ_REG(dr7) |
| 274 | 274 | ||
| 275 | GEN_WRITE_REG(dr0); |
275 | GEN_WRITE_REG(dr0) |
| 276 | GEN_WRITE_REG(dr1); |
276 | GEN_WRITE_REG(dr1) |
| 277 | GEN_WRITE_REG(dr2); |
277 | GEN_WRITE_REG(dr2) |
| 278 | GEN_WRITE_REG(dr3); |
278 | GEN_WRITE_REG(dr3) |
| 279 | GEN_WRITE_REG(dr6); |
279 | GEN_WRITE_REG(dr6) |
| 280 | GEN_WRITE_REG(dr7); |
280 | GEN_WRITE_REG(dr7) |
| 281 | 281 | ||
| 282 | extern size_t interrupt_handler_size; |
282 | extern size_t interrupt_handler_size; |
| 283 | extern void interrupt_handlers(void); |
283 | extern void interrupt_handlers(void); |
| 284 | 284 | ||
| 285 | #endif |
285 | #endif |