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| 1 | /* |
1 | /* |
| 2 | * Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
2 | * Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
| 3 | * All rights reserved. |
3 | * All rights reserved. |
| 4 | * |
4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
7 | * are met: |
| 8 | * |
8 | * |
| 9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
| 14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
| 15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
| 16 | * |
16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
27 | */ |
| 28 | 28 | ||
| 29 | 29 | ||
| 30 | /** @addtogroup arm32boot |
30 | /** @addtogroup arm32boot |
| 31 | * @{ |
31 | * @{ |
| 32 | */ |
32 | */ |
| 33 | /** @file |
33 | /** @file |
| 34 | * @brief Memory management used while booting the kernel. |
34 | * @brief Memory management used while booting the kernel. |
| 35 | */ |
35 | */ |
| 36 | 36 | ||
| 37 | 37 | ||
| 38 | #include "mm.h" |
38 | #include "mm.h" |
| 39 | 39 | ||
| 40 | 40 | ||
| 41 | /** Initializes "section" page table entry. |
41 | /** Initializes "section" page table entry. |
| 42 | * |
42 | * |
| 43 | * Will be readable/writable by kernel with no access from user mode. |
43 | * Will be readable/writable by kernel with no access from user mode. |
| 44 | * Will belong to domain 0. No cache or buffering is enabled. |
44 | * Will belong to domain 0. No cache or buffering is enabled. |
| 45 | * |
45 | * |
| 46 | * @param pte Section entry to initialize. |
46 | * @param pte Section entry to initialize. |
| 47 | * @param frame First frame in the section (frame number). |
47 | * @param frame First frame in the section (frame number). |
| 48 | * |
48 | * |
| 49 | * @note If frame is not 1MB aligned, first lower 1MB aligned frame will be used. |
49 | * @note If frame is not 1MB aligned, first lower 1MB aligned frame will be |
| - | 50 | * used. |
|
| 50 | */ |
51 | */ |
| 51 | static void init_pte_level0_section(pte_level0_section_t* pte, unsigned int frame) |
52 | static void init_pte_level0_section(pte_level0_section_t* pte, |
| - | 53 | unsigned int frame) |
|
| 52 | { |
54 | { |
| 53 | pte->descriptor_type = PTE_DESCRIPTOR_SECTION; |
55 | pte->descriptor_type = PTE_DESCRIPTOR_SECTION; |
| 54 | pte->bufferable = 0; |
56 | pte->bufferable = 0; |
| 55 | pte->cacheable = 0; |
57 | pte->cacheable = 0; |
| 56 | pte->impl_specific = 0; |
58 | pte->impl_specific = 0; |
| 57 | pte->domain = 0; |
59 | pte->domain = 0; |
| 58 | pte->should_be_zero_1 = 0; |
60 | pte->should_be_zero_1 = 0; |
| 59 | pte->access_permission = PTE_AP_USER_NO_KERNEL_RW; |
61 | pte->access_permission = PTE_AP_USER_NO_KERNEL_RW; |
| 60 | pte->should_be_zero_2 = 0; |
62 | pte->should_be_zero_2 = 0; |
| 61 | pte->section_base_addr = frame; |
63 | pte->section_base_addr = frame; |
| 62 | } |
64 | } |
| 63 | - | ||
| 64 | 65 | ||
| 65 | /** Initializes page table used while booting the kernel. */ |
66 | /** Initializes page table used while booting the kernel. */ |
| 66 | static void init_page_table(void) |
67 | static void init_page_table(void) |
| 67 | { |
68 | { |
| 68 | int i; |
69 | int i; |
| 69 | const unsigned int first_kernel_page = ADDR2PFN(PA2KA(0)); |
70 | const unsigned int first_kernel_page = ADDR2PFN(PA2KA(0)); |
| 70 | 71 | ||
| 71 | // create 1:1 virtual-physical mapping (in lower 2GB) |
72 | /* Create 1:1 virtual-physical mapping (in lower 2GB). */ |
| 72 | for (i = 0; i < first_kernel_page; i++) { |
73 | for (i = 0; i < first_kernel_page; i++) { |
| 73 | init_pte_level0_section(&page_table[i], i); |
74 | init_pte_level0_section(&page_table[i], i); |
| 74 | } |
75 | } |
| 75 | 76 | ||
| - | 77 | /* |
|
| 76 | // create 1:1 virtual-physical mapping in kernel space (upper 2GB), |
78 | * Create 1:1 virtual-physical mapping in kernel space (upper 2GB), |
| 77 | // physical addresses start from 0 |
79 | * physical addresses start from 0. |
| - | 80 | */ |
|
| 78 | for (i = first_kernel_page; i < PTL0_ENTRIES; i++) { |
81 | for (i = first_kernel_page; i < PTL0_ENTRIES; i++) { |
| 79 | init_pte_level0_section(&page_table[i], i - first_kernel_page); |
82 | init_pte_level0_section(&page_table[i], i - first_kernel_page); |
| 80 | } |
83 | } |
| 81 | } |
84 | } |
| 82 | - | ||
| 83 | 85 | ||
| 84 | /** Starts the MMU - initializes page table and enables paging. */ |
86 | /** Starts the MMU - initializes page table and enables paging. */ |
| 85 | void mmu_start() { |
87 | void mmu_start() { |
| 86 | init_page_table(); |
88 | init_page_table(); |
| 87 | set_ptl0_address(page_table); |
89 | set_ptl0_address(page_table); |
| 88 | enable_paging(); |
90 | enable_paging(); |
| 89 | } |
91 | } |
| 90 | - | ||
| 91 | 92 | ||
| 92 | /** @} |
93 | /** @} |
| 93 | */ |
94 | */ |
| 94 | 95 | ||