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70 | #include <print.h> |
70 | #include <print.h> |
71 | /* Execute code associated with IRQ notification */ |
71 | /* Execute code associated with IRQ notification */ |
72 | static void code_execute(call_t *call, irq_code_t *code) |
72 | static void code_execute(call_t *call, irq_code_t *code) |
73 | { |
73 | { |
74 | int i; |
74 | int i; |
75 | __native dstval = 0; |
75 | unative_t dstval = 0; |
76 | 76 | ||
77 | if (!code) |
77 | if (!code) |
78 | return; |
78 | return; |
79 | 79 | ||
80 | for (i=0; i < code->cmdcount;i++) { |
80 | for (i=0; i < code->cmdcount;i++) { |
81 | switch (code->cmds[i].cmd) { |
81 | switch (code->cmds[i].cmd) { |
82 | case CMD_MEM_READ_1: |
82 | case CMD_MEM_READ_1: |
83 | dstval = *((__u8 *)code->cmds[i].addr); |
83 | dstval = *((uint8_t *)code->cmds[i].addr); |
84 | break; |
84 | break; |
85 | case CMD_MEM_READ_2: |
85 | case CMD_MEM_READ_2: |
86 | dstval = *((__u16 *)code->cmds[i].addr); |
86 | dstval = *((uint16_t *)code->cmds[i].addr); |
87 | break; |
87 | break; |
88 | case CMD_MEM_READ_4: |
88 | case CMD_MEM_READ_4: |
89 | dstval = *((__u32 *)code->cmds[i].addr); |
89 | dstval = *((uint32_t *)code->cmds[i].addr); |
90 | break; |
90 | break; |
91 | case CMD_MEM_READ_8: |
91 | case CMD_MEM_READ_8: |
92 | dstval = *((__u64 *)code->cmds[i].addr); |
92 | dstval = *((uint64_t *)code->cmds[i].addr); |
93 | break; |
93 | break; |
94 | case CMD_MEM_WRITE_1: |
94 | case CMD_MEM_WRITE_1: |
95 | *((__u8 *)code->cmds[i].addr) = code->cmds[i].value; |
95 | *((uint8_t *)code->cmds[i].addr) = code->cmds[i].value; |
96 | break; |
96 | break; |
97 | case CMD_MEM_WRITE_2: |
97 | case CMD_MEM_WRITE_2: |
98 | *((__u16 *)code->cmds[i].addr) = code->cmds[i].value; |
98 | *((uint16_t *)code->cmds[i].addr) = code->cmds[i].value; |
99 | break; |
99 | break; |
100 | case CMD_MEM_WRITE_4: |
100 | case CMD_MEM_WRITE_4: |
101 | *((__u32 *)code->cmds[i].addr) = code->cmds[i].value; |
101 | *((uint32_t *)code->cmds[i].addr) = code->cmds[i].value; |
102 | break; |
102 | break; |
103 | case CMD_MEM_WRITE_8: |
103 | case CMD_MEM_WRITE_8: |
104 | *((__u64 *)code->cmds[i].addr) = code->cmds[i].value; |
104 | *((uint64_t *)code->cmds[i].addr) = code->cmds[i].value; |
105 | break; |
105 | break; |
106 | #if defined(ia32) || defined(amd64) |
106 | #if defined(ia32) || defined(amd64) |
107 | case CMD_PORT_READ_1: |
107 | case CMD_PORT_READ_1: |
108 | dstval = inb((long)code->cmds[i].addr); |
108 | dstval = inb((long)code->cmds[i].addr); |
109 | break; |
109 | break; |
Line 232... | Line 232... | ||
232 | } |
232 | } |
233 | 233 | ||
234 | /** Send notification message |
234 | /** Send notification message |
235 | * |
235 | * |
236 | */ |
236 | */ |
237 | void ipc_irq_send_msg(int irq, __native a1, __native a2, __native a3) |
237 | void ipc_irq_send_msg(int irq, unative_t a1, unative_t a2, unative_t a3) |
238 | { |
238 | { |
239 | call_t *call; |
239 | call_t *call; |
240 | int mq = irq + IPC_IRQ_RESERVED_VIRTUAL; |
240 | int mq = irq + IPC_IRQ_RESERVED_VIRTUAL; |
241 | 241 | ||
242 | spinlock_lock(&irq_conns[mq].lock); |
242 | spinlock_lock(&irq_conns[mq].lock); |