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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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#include <arch/mm/tlb.h>
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#include <arch/mm/tlb.h>
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#include <mm/tlb.h>
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#include <mm/tlb.h>
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#include <arch/mm/frame.h>
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#include <arch/mm/page.h>
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#include <arch/mm/mmu.h>
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#include <print.h>
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#include <print.h>
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#include <arch/types.h>
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#include <arch/types.h>
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#include <typedefs.h>
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#include <typedefs.h>
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#include <config.h>
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/** Initialize ITLB and DTLB.
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 *
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 * The goal of this function is to disable MMU
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 * so that both TLBs can be purged and new
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 * kernel 4M locked entry can be installed.
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 * After TLB is initialized, MMU is enabled
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 * again.
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 */
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void tlb_arch_init(void)
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void tlb_arch_init(void)
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{
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{
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    tlb_tag_access_reg_t tag;
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    tlb_data_t data;
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    frame_address_t fr;
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    page_address_t pg;
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    fr.address = config.base;
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    pg.address = config.base;
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    immu_disable();
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    dmmu_disable();
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    /*
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     * For simplicity, we do identity mapping of first 4M of memory.
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     * The very next change should be leaving the first 4M unmapped.
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     */
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    tag.value = 0;
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    tag.vpn = pg.vpn;
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    itlb_tag_access_write(tag.value);
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    dtlb_tag_access_write(tag.value);
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    data.value = 0;
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    data.v = true;
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    data.size = PAGESIZE_4M;
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    data.pfn = fr.pfn;
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    data.l = true;
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    data.cp = 1;
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    data.cv = 1;
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    data.p = true;
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    data.w = true;
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    data.g = true;
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    itlb_data_in_write(data.value);
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    dtlb_data_in_write(data.value);
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    tlb_invalidate_all();
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    dmmu_enable();
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    immu_enable();
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}
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}
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/** Print contents of both TLBs. */
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/** Print contents of both TLBs. */
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void tlb_print(void)
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void tlb_print(void)
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{
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{
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    tlb_tag_read_reg_t t;
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    tlb_tag_read_reg_t t;
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    for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
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    for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
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        d.value = itlb_data_access_read(i);
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        d.value = itlb_data_access_read(i);
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        if (!d.l) {
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        if (!d.l) {
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            printf("invalidating ");
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            t.value = itlb_tag_read_read(i);
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            t.value = itlb_tag_read_read(i);
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            d.v = false;
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            d.v = false;
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            itlb_tag_access_write(t.value);
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            itlb_tag_access_write(t.value);
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            itlb_data_access_write(i, d.value);
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            itlb_data_access_write(i, d.value);
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        }
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        }