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#include <arch/asm/regname.h>
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#include <arch/asm/regname.h>
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.text
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.text
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-
 
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.global userspace_asm
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.global iret
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.global iret
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.global iret_syscall
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.global memsetb
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.global memsetb
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.global memcpy
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.global memcpy
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.global memcpy_from_uspace
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.global memcpy_to_uspace
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.global memcpy_from_uspace_failover_address
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.global memcpy_to_uspace_failover_address
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userspace_asm:
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	# r3 = uspace_uarg
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	# r4 = stack
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	# r5 = entry
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	# disable interrupts
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	mfmsr r31
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	rlwinm r31, r31, 0, 17, 15
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	mtmsr r31
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	# set entry point
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-
 
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	mtsrr0 r5
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	# set problem state, enable interrupts
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	ori r31, r31, msr_pr
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	ori r31, r31, msr_ee
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	mtsrr1 r31
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	# set stack
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	mr sp, r4
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-
 
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	# jump to userspace
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	rfi
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iret:
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iret:
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	lwz r3, 144(sp)
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	mtxer r3
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	lwz r3, 140(sp)
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	# disable interrupts
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	mtctr r3
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-
 
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	mfmsr r31
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	rlwinm r31, r31, 0, 17, 15
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	mtmsr r31
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	lwz r0, 8(sp)
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	lwz r2, 12(sp)
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	lwz r3, 136(sp)
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	lwz r3, 16(sp)
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	lwz r4, 20(sp)
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	lwz r5, 24(sp)
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	lwz r6, 28(sp)
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	lwz r7, 32(sp)
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	lwz r8, 36(sp)
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	lwz r9, 40(sp)
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	lwz r10, 44(sp)
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	lwz r11, 48(sp)
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	lwz r13, 52(sp)
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	lwz r14, 56(sp)
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	lwz r15, 60(sp)
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	lwz r16, 64(sp)
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	lwz r17, 68(sp)
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	lwz r18, 72(sp)
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	lwz r19, 76(sp)
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	lwz r20, 80(sp)
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	lwz r21, 84(sp)
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	lwz r22, 88(sp)
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	lwz r23, 92(sp)
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	lwz r24, 96(sp)
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	lwz r25, 100(sp)
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	lwz r26, 104(sp)
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	lwz r27, 108(sp)
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	lwz r28, 112(sp)
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	lwz r29, 116(sp)
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	lwz r30, 120(sp)
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	lwz r31, 124(sp)
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	lwz r12, 128(sp)
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	mtcr r3
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	mtcr r12
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	lwz r12, 132(sp)
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	mtsrr0 r12
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	lwz r12, 136(sp)
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	mtsrr1 r12
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	lwz r12, 140(sp)
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	mtlr r12
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	lwz r3, 132(sp)
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	lwz r12, 144(sp)
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	mtlr r3
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	mtctr r12
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	lwz r3, 128(sp)
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	mtspr srr1, r3
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	lwz r3, 124(sp)
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	mtspr srr0, r3
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-
 
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	lwz r0, 0(sp)
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	lwz r2, 4(sp)
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	lwz r3, 8(sp)
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	lwz r4, 12(sp)
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	lwz r5, 16(sp)
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	lwz r6, 20(sp)
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	lwz r7, 24(sp)
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	lwz r8, 28(sp)
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	lwz r9, 32(sp)
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	lwz r10, 36(sp)
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	lwz r11, 40(sp)
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	lwz r12, 44(sp)
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	lwz r13, 48(sp)
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	lwz r14, 52(sp)
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	lwz r15, 56(sp)
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	lwz r16, 60(sp)
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	lwz r17, 64(sp)
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	lwz r18, 68(sp)
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	lwz r19, 72(sp)
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	lwz r20, 76(sp)
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	lwz r21, 80(sp)
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	lwz r22, 84(sp)
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	lwz r23, 88(sp)
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	lwz r24, 92(sp)
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	lwz r25, 96(sp)
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	lwz r26, 100(sp)
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	lwz r27, 104(sp)
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	lwz r28, 108(sp)
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	lwz r29, 112(sp)
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	lwz r30, 116(sp)
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	lwz r31, 120(sp)
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-
 
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	lwz r12, 148(sp)
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	mtxer r12
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	lwz r12, 152(sp)
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	mfspr sp, sprg1
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	lwz sp, 156(sp)
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	rfi
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	rfi
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-
 
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iret_syscall:
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	# reset decrementer
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	li r31, 1000
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	mtdec r31
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	# disable interrupts
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	mfmsr r31
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	rlwinm r31, r31, 0, 17, 15
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	mtmsr r31
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	lwz r0, 8(sp)
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	lwz r2, 12(sp)
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	lwz r4, 20(sp)
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	lwz r5, 24(sp)
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	lwz r6, 28(sp)
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	lwz r7, 32(sp)
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	lwz r8, 36(sp)
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	lwz r9, 40(sp)
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	lwz r10, 44(sp)
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	lwz r11, 48(sp)
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	lwz r13, 52(sp)
-
 
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	lwz r14, 56(sp)
-
 
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	lwz r15, 60(sp)
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	lwz r16, 64(sp)
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	lwz r17, 68(sp)
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	lwz r18, 72(sp)
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	lwz r19, 76(sp)
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	lwz r20, 80(sp)
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	lwz r21, 84(sp)
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	lwz r22, 88(sp)
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	lwz r23, 92(sp)
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	lwz r24, 96(sp)
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	lwz r25, 100(sp)
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	lwz r26, 104(sp)
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	lwz r27, 108(sp)
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	lwz r28, 112(sp)
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	lwz r29, 116(sp)
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	lwz r30, 120(sp)
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	lwz r31, 124(sp)
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-
 
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	lwz r12, 128(sp)
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	mtcr r12
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	lwz r12, 132(sp)
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	mtsrr0 r12
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	lwz r12, 136(sp)
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	mtsrr1 r12
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	lwz r12, 140(sp)
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	mtlr r12
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	lwz r12, 144(sp)
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	mtctr r12
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-
 
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	lwz r12, 148(sp)
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	mtxer r12
-
 
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	lwz r12, 152(sp)
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	lwz sp, 156(sp)
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	rfi
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200
	
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memsetb:
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memsetb:
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	rlwimi r5, r5, 8, 16, 23
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	rlwimi r5, r5, 8, 16, 23
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	rlwimi r5, r5, 16, 0, 15
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	rlwimi r5, r5, 16, 0, 15
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	bdnz 8b
240
	bdnz 8b
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241
	
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	blr
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	blr
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memcpy:
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memcpy:
-
 
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memcpy_from_uspace:
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memcpy_to_uspace:
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	srwi. r7, r5, 3
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	srwi. r7, r5, 3
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	addi r6, r3, -4
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	addi r6, r3, -4
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	addi r4, r4, -4
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	addi r4, r4, -4
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	beq	2f
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	beq	2f
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	subf r5, r0, r5
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	subf r5, r0, r5
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	rlwinm. r7, r5, 32-3, 3, 31
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	rlwinm. r7, r5, 32-3, 3, 31
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	beq 2b
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	beq 2b
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	mtctr r7
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	mtctr r7
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	b 1b
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	b 1b
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memcpy_from_uspace_failover_address:
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memcpy_to_uspace_failover_address:
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	b memcpy_from_uspace_failover_address