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32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch/mm/as.h> |
35 | #include <arch/mm/as.h> |
36 | #include <genarch/mm/as_pt.h> |
36 | #include <genarch/mm/as_pt.h> |
- | 37 | #include <genarch/mm/asid_fifo.h> |
|
- | 38 | #include <arch.h> |
|
37 | 39 | ||
38 | /** Architecture dependent address space init. */ |
40 | /** Architecture dependent address space init. */ |
39 | void as_arch_init(void) |
41 | void as_arch_init(void) |
40 | { |
42 | { |
41 | as_operations = &as_pt_operations; |
43 | as_operations = &as_pt_operations; |
- | 44 | asid_fifo_init(); |
|
- | 45 | } |
|
- | 46 | ||
- | 47 | /** Install address space. |
|
- | 48 | * |
|
- | 49 | * Install ASID. |
|
- | 50 | * |
|
- | 51 | * @param as Address space structure. |
|
- | 52 | * |
|
- | 53 | */ |
|
- | 54 | void as_install_arch(as_t *as) |
|
- | 55 | { |
|
- | 56 | asid_t asid; |
|
- | 57 | ipl_t ipl; |
|
- | 58 | __u8 sr; |
|
- | 59 | ||
- | 60 | ipl = interrupts_disable(); |
|
- | 61 | spinlock_lock(&as->lock); |
|
- | 62 | ||
- | 63 | asid = as->asid; |
|
- | 64 | ||
- | 65 | /* Lower 2 GB, user and supervisor access */ |
|
- | 66 | for (sr = 0; sr < 8; sr++) { |
|
- | 67 | asm volatile ( |
|
- | 68 | "mtsrin %0, %1\n" |
|
- | 69 | : |
|
- | 70 | : "r" (0x6000 + (asid << 4) + sr), "r" (sr * 0x1000) |
|
- | 71 | ); |
|
- | 72 | } |
|
- | 73 | ||
- | 74 | /* Upper 2 GB, only supervisor access */ |
|
- | 75 | for (sr = 8; sr < 16; sr++) { |
|
- | 76 | asm volatile ( |
|
- | 77 | "mtsrin %0, %1\n" |
|
- | 78 | : |
|
- | 79 | : "r" (0x4000 + (asid << 4) + sr), "r" (sr * 0x1000) |
|
- | 80 | ); |
|
- | 81 | } |
|
- | 82 | ||
- | 83 | spinlock_unlock(&as->lock); |
|
- | 84 | interrupts_restore(ipl); |
|
42 | } |
85 | } |
43 | 86 | ||
44 | /** @} |
87 | /** @} |
45 | */ |
88 | */ |