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179 | /* Special Purpose Registers (SPRs) */ |
179 | /* Special Purpose Registers (SPRs) */ |
180 | #define xer 1 |
180 | #define xer 1 |
181 | #define lr 8 |
181 | #define lr 8 |
182 | #define ctr 9 |
182 | #define ctr 9 |
183 | #define dec 22 |
183 | #define dec 22 |
- | 184 | #define sdr1 25 |
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184 | #define srr0 26 |
185 | #define srr0 26 |
185 | #define srr1 27 |
186 | #define srr1 27 |
186 | #define sprg0 272 |
187 | #define sprg0 272 |
187 | #define sprg1 273 |
188 | #define sprg1 273 |
188 | #define sprg2 274 |
189 | #define sprg2 274 |
189 | #define sprg3 275 |
190 | #define sprg3 275 |
190 | #define prv 287 |
191 | #define prv 287 |
- | 192 | #define hid0 1008 |
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191 | 193 | ||
192 | /* MSR bits */ |
194 | /* MSR bits */ |
193 | #define msr_ir (1 << 4) |
195 | #define msr_ir (1 << 4) |
194 | #define msr_dr (1 << 5) |
196 | #define msr_dr (1 << 5) |
195 | 197 | ||
- | 198 | /* HID0 bits */ |
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- | 199 | #define hid0_ice (1 << 15) |
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- | 200 | #define hid0_dce (1 << 14) |
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- | 201 | #define hid0_icfi (1 << 11) |
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- | 202 | #define hid0_dci (1 << 10) |
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- | 203 | ||
- | 204 | /* Cache sizes */ |
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- | 205 | #define L1_CACHE_LINES (128 * 8) |
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- | 206 | #define L1_CACHE_BYTES 5 |
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- | 207 | ||
196 | #endif |
208 | #endif |