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#define cp0_mask_all_int() cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask))
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#define cp0_mask_all_int() cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask))
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#define cp0_unmask_all_int() cp0_status_write(cp0_status_read() | cp0_status_im_mask)
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#define cp0_unmask_all_int() cp0_status_write(cp0_status_read() | cp0_status_im_mask)
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#define cp0_mask_int(it) cp0_status_write(cp0_status_read() & ~(1<<(cp0_status_im_shift+(it))))
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#define cp0_mask_int(it) cp0_status_write(cp0_status_read() & ~(1<<(cp0_status_im_shift+(it))))
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#define cp0_unmask_int(it) cp0_status_write(cp0_status_read() | (1<<(cp0_status_im_shift+(it))))
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#define cp0_unmask_int(it) cp0_status_write(cp0_status_read() | (1<<(cp0_status_im_shift+(it))))
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#define GEN_READ_CP0(nm,reg) static inline __u32 cp0_ ##nm##_read(void) \
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  { \
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extern  __u32 cp0_index_read(void);
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      __u32 retval; \
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extern void cp0_index_write(__u32 val);
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      asm("mfc0 %0, $" #reg : "=r"(retval)); \
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      return retval; \
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  }
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#define GEN_WRITE_CP0(nm,reg) static inline void cp0_ ##nm##_write(__u32 val) \
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 { \
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extern __u32 cp0_random_read(void);
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    asm("mtc0 %0, $" #reg : : "r"(val) ); \
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 }
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extern __u32 cp0_entry_lo0_read(void);
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GEN_READ_CP0(index, 0);
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extern void cp0_entry_lo0_write(__u32 val);
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GEN_WRITE_CP0(index, 0);
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extern __u32 cp0_entry_lo1_read(void);
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GEN_READ_CP0(random, 1);
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extern void cp0_entry_lo1_write(__u32 val);
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extern __u32 cp0_context_read(void);
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GEN_READ_CP0(entry_lo0, 2);
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extern void cp0_context_write(__u32 val);
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GEN_WRITE_CP0(entry_lo0, 2);
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extern __u32 cp0_pagemask_read(void);
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GEN_READ_CP0(entry_lo1, 3);
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extern void cp0_pagemask_write(__u32 val);
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GEN_WRITE_CP0(entry_lo1, 3);
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extern __u32 cp0_wired_read(void);
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GEN_READ_CP0(context, 4);
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extern void cp0_wired_write(__u32 val);
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GEN_WRITE_CP0(context, 4);
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extern __u32 cp0_badvaddr_read(void);
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GEN_READ_CP0(pagemask, 5);
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GEN_WRITE_CP0(pagemask, 5);
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extern __u32 cp0_count_read(void);
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GEN_READ_CP0(wired, 6);
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extern void cp0_count_write(__u32 val);
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GEN_WRITE_CP0(wired, 6);
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extern __u32 cp0_entry_hi_read(void);
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GEN_READ_CP0(badvaddr, 8);
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extern void cp0_entry_hi_write(__u32 val);
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extern __u32 cp0_compare_read(void);
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GEN_READ_CP0(count, 9);
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extern void cp0_compare_write(__u32 val);
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GEN_WRITE_CP0(count, 9);
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extern __u32 cp0_status_read(void);
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GEN_READ_CP0(entry_hi, 10);
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extern void cp0_status_write(__u32 val);
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GEN_WRITE_CP0(entry_hi, 10);
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extern __u32 cp0_cause_read(void);
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GEN_READ_CP0(compare, 11);
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extern void cp0_cause_write(__u32 val);
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GEN_WRITE_CP0(compare, 11);
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extern __u32 cp0_epc_read(void);
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GEN_READ_CP0(status, 12);
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extern void cp0_epc_write(__u32 val);
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GEN_WRITE_CP0(status, 12);
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GEN_READ_CP0(cause, 13);
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GEN_WRITE_CP0(cause, 13);
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GEN_READ_CP0(epc, 14);
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GEN_WRITE_CP0(epc, 14);
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extern __u32 cp0_prid_read(void);
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GEN_READ_CP0(prid, 15);
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#endif
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#endif