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24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
- | 29 | ||
29 | #include <arch/register.h> |
30 | #include <arch/register.h> |
- | 31 | #include <arch/mm/page.h> |
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- | 32 | #include <arch/mm/asid.h> |
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- | 33 | #include <mm/asid.h> |
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- | 34 | ||
- | 35 | ||
- | 36 | #define RR_MASK (0xFFFFFFFF00000002) |
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- | 37 | #define RID_SHIFT 8 |
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- | 38 | #define PS_SHIFT 2 |
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- | 39 | ||
- | 40 | ||
- | 41 | #define KERNEL_TRANSLATION_I 0x0010000000000661 |
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- | 42 | #define KERNEL_TRANSLATION_D 0x0010000000000661 |
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- | 43 | ||
30 | 44 | ||
31 | .section K_TEXT_START |
45 | .section K_TEXT_START |
32 | 46 | ||
33 | .global kernel_image_start |
47 | .global kernel_image_start |
34 | 48 | ||
35 | stack0: |
49 | stack0: |
36 | kernel_image_start: |
50 | kernel_image_start: |
37 | .auto |
51 | .auto |
38 | 52 | ||
- | 53 | #Fill TR.i and TR.d and enable paging |
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- | 54 | ||
- | 55 | mov r9=rr[r0] |
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- | 56 | movl r10=(RR_MASK) |
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- | 57 | and r9=r10,r9 |
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- | 58 | movl r10=((ASID2RID(ASID_KERNEL,VRN_KERNEL)<<RID_SHIFT)|(KERNEL_PAGE_WIDTH<<PS_SHIFT)) |
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- | 59 | or r9=r10,r9 |
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- | 60 | mov rr[r0]=r9 |
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- | 61 | ||
- | 62 | ||
- | 63 | ||
- | 64 | movl r8=(VRN_KERNEL<<VRN_SHIFT) |
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- | 65 | mov r9=rr[r8] |
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- | 66 | movl r10=(RR_MASK) |
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- | 67 | and r9=r10,r9 |
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- | 68 | movl r10=((ASID2RID(ASID_KERNEL,VRN_KERNEL)<<RID_SHIFT)|(KERNEL_PAGE_WIDTH<<PS_SHIFT)) |
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- | 69 | or r9=r10,r9 |
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- | 70 | mov rr[r8]=r9 |
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- | 71 | ||
- | 72 | ||
- | 73 | movl r8=(VRN_KERNEL<<VRN_SHIFT) |
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- | 74 | mov cr.ifa=r8 |
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- | 75 | movl r10=(KERNEL_PAGE_WIDTH<<PS_SHIFT) |
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- | 76 | mov cr.itir=r10 |
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- | 77 | movl r10=(KERNEL_TRANSLATION_I) |
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- | 78 | itr.i itr[r0]=r10 |
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- | 79 | ||
- | 80 | # mov cr.ifa=r0 |
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- | 81 | # movl r10=(KERNEL_PAGE_WIDTH<<PS_SHIFT) |
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- | 82 | # mov cr.itir=r10 |
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- | 83 | movl r10=(KERNEL_TRANSLATION_D) |
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- | 84 | itr.d dtr[r0]=r10 |
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- | 85 | ||
- | 86 | ||
- | 87 | ||
- | 88 | ||
- | 89 | ||
- | 90 | ||
- | 91 | ||
39 | # initialize PSR |
92 | # initialize PSR |
40 | mov psr.l = r0 |
93 | mov psr.l = r0 |
41 | srlz.i |
94 | srlz.i |
42 | srlz.d |
95 | srlz.d |
- | 96 | movl r10=(PSR_DT_MASK|PSR_RT_MASK|PSR_IT_MASK|PSR_IC_MASK) /*Enable paging*/ |
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- | 97 | mov r9=psr |
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- | 98 | or r10=r10,r9 |
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43 | ssm PSR_IC_MASK |
99 | mov cr.ipsr=r10 |
- | 100 | mov cr.ifs=r0 |
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- | 101 | # movl r8=(paging_start+VRN_KERNEL<<VRN_SHIFT) |
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- | 102 | movl r8=paging_start |
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- | 103 | mov cr.iip=r8 |
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44 | srlz.d |
104 | srlz.d |
- | 105 | srlz.i |
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- | 106 | .explicit |
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- | 107 | {rfi;;} |
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- | 108 | {nop 0;;} |
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- | 109 | {nop 0;;} |
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- | 110 | {nop 0;;} |
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- | 111 | {nop 0;;} |
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- | 112 | {nop 0;;} |
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- | 113 | {nop 0;;} |
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- | 114 | {nop 0;;} |
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- | 115 | {nop 0;;} |
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- | 116 | {nop 0;;} |
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- | 117 | {nop 0;;} |
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- | 118 | {nop 0;;} |
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- | 119 | {nop 0;;} |
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- | 120 | {nop 0;;} |
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- | 121 | {nop 0;;} |
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- | 122 | {nop 0;;} |
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- | 123 | {nop 0;;} |
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- | 124 | ||
- | 125 | .global paging_start |
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- | 126 | paging_start: |
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- | 127 | ||
- | 128 | .auto |
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45 | 129 | ||
46 | # switch to register bank 1 |
130 | # switch to register bank 1 |
47 | bsw.1 |
131 | bsw.1 |
48 | 132 | ||
49 | # initialize register stack |
133 | # initialize register stack |
50 | mov ar.rsc = r0 |
134 | mov ar.rsc = r0 |
- | 135 | movl r8=(VRN_KERNEL<<VRN_SHIFT) |
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- | 136 | mov ar.bspstore = r8 |
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51 | mov ar.bspstore = r0 |
137 | # mov ar.bspstore = r0 |
52 | loadrs |
138 | loadrs |
53 | 139 | ||
54 | .explicit |
140 | .explicit |
55 | # initialize memory stack to some sane value |
141 | # initialize memory stack to some sane value |
56 | movl r12 = stack0 ;; |
142 | # movl r12 = stack0 ;; |
- | 143 | movl r12 = stack0 + (VRN_KERNEL<<VRN_SHIFT);; |
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- | 144 | ||
57 | add r12 = - 16, r12 /* allocate a scratch area on the stack */ |
145 | add r12 = - 16, r12 /* allocate a scratch area on the stack */ |
58 | 146 | ||
59 | # initialize gp (Global Pointer) register |
147 | # initialize gp (Global Pointer) register |
60 | movl r1 = _hardcoded_load_address |
148 | movl r1 = _hardcoded_load_address ;; |
- | 149 | ||
- | 150 | # movl r1 = _hardcoded_load_address + (VRN_KERNEL<<VRN_SHIFT) ;; |
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61 | 151 | ||
62 | ;; |
- | |
63 | 152 | ||
64 | # |
153 | # |
65 | # Initialize hardcoded_* variables. |
154 | # Initialize hardcoded_* variables. |
66 | # |
155 | # |
67 | movl r14 = _hardcoded_ktext_size |
156 | movl r14 = _hardcoded_ktext_size |
Line 69... | Line 158... | ||
69 | movl r16 = _hardcoded_load_address |
158 | movl r16 = _hardcoded_load_address |
70 | addl r17 = @gprel(hardcoded_ktext_size), gp |
159 | addl r17 = @gprel(hardcoded_ktext_size), gp |
71 | addl r18 = @gprel(hardcoded_kdata_size), gp |
160 | addl r18 = @gprel(hardcoded_kdata_size), gp |
72 | addl r19 = @gprel(hardcoded_load_address), gp |
161 | addl r19 = @gprel(hardcoded_load_address), gp |
73 | ;; |
162 | ;; |
74 | st8 [r17] = r14 |
163 | st4 [r17] = r14 |
75 | st8 [r18] = r15 |
164 | st4 [r18] = r15 |
76 | st8 [r19] = r16 |
165 | st8 [r19] = r16 |
- | 166 | ||
- | 167 | ||
- | 168 | .auto |
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77 | 169 | ||
- | 170 | movl r18=main_bsp |
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- | 171 | mov b1=r18 |
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- | 172 | br.call.sptk.many b0=b1 |
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- | 173 | ||
78 | br.call.sptk.many b0=main_bsp |
174 | # br.call.sptk.many b0=main_bsp |
79 | 175 | ||
80 | 0: |
176 | 0: |
81 | br 0b |
177 | br 0b |