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36 | #include <mm/as.h> |
36 | #include <mm/as.h> |
37 | #include <arch/mm/tlb.h> |
37 | #include <arch/mm/tlb.h> |
38 | #include <arch/mm/page.h> |
38 | #include <arch/mm/page.h> |
39 | #include <arch/barrier.h> |
39 | #include <arch/barrier.h> |
40 | #include <arch/interrupt.h> |
40 | #include <arch/interrupt.h> |
- | 41 | #include <arch/pal/pal.h> |
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- | 42 | #include <arch/asm.h> |
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41 | #include <typedefs.h> |
43 | #include <typedefs.h> |
42 | #include <panic.h> |
44 | #include <panic.h> |
43 | #include <arch.h> |
45 | #include <arch.h> |
44 | 46 | ||
45 | /** Invalidate all TLB entries. */ |
47 | /** Invalidate all TLB entries. */ |
46 | void tlb_invalidate_all(void) |
48 | void tlb_invalidate_all(void) |
47 | { |
49 | { |
- | 50 | __address adr; |
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- | 51 | __u32 count1,count2,stride1,stride2; |
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- | 52 | ||
- | 53 | int i,j; |
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- | 54 | ||
- | 55 | adr=PAL_PTCE_INFO_BASE(); |
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- | 56 | count1=PAL_PTCE_INFO_COUNT1(); |
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- | 57 | count2=PAL_PTCE_INFO_COUNT2(); |
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- | 58 | stride1=PAL_PTCE_INFO_STRIDE1(); |
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- | 59 | stride2=PAL_PTCE_INFO_STRIDE2(); |
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- | 60 | ||
- | 61 | interrupts_disable(); |
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- | 62 | ||
- | 63 | for(i=0;i<count1;i++) |
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- | 64 | { |
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- | 65 | for(j=0;j<count2;j++) |
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- | 66 | { |
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- | 67 | asm volatile |
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- | 68 | ( |
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- | 69 | "ptc.e %0;;" |
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- | 70 | : |
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- | 71 | :"r" (adr) |
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- | 72 | ); |
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- | 73 | adr+=stride2; |
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- | 74 | } |
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- | 75 | adr+=stride1; |
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- | 76 | } |
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- | 77 | ||
- | 78 | interrupts_enable(); |
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- | 79 | ||
- | 80 | srlz_d(); |
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48 | /* TODO */ |
81 | srlz_i(); |
49 | } |
82 | } |
50 | 83 | ||
51 | /** Invalidate entries belonging to an address space. |
84 | /** Invalidate entries belonging to an address space. |
52 | * |
85 | * |
53 | * @param asid Address space identifier. |
86 | * @param asid Address space identifier. |