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| Rev 879 | Rev 901 | ||
|---|---|---|---|
| Line 53... | Line 53... | ||
| 53 | } |
53 | } |
| 54 | 54 | ||
| 55 | /** Initialize VHPT and region registers. */ |
55 | /** Initialize VHPT and region registers. */ |
| 56 | void set_environment(void) |
56 | void set_environment(void) |
| 57 | { |
57 | { |
| 58 | - | ||
| 59 | region_register rr; |
58 | region_register rr; |
| 60 | pta_register pta; |
59 | pta_register pta; |
| 61 | int i; |
60 | int i; |
| 62 | 61 | ||
| 63 | /* |
62 | /* |
| 64 | * First set up kernel region register. |
63 | * First set up kernel region register. |
| 65 | * This action is redundand (see start.S) but I would to keep it to make sure that |
64 | * This is redundant (see start.S) but we keep it here just for sure. |
| 66 | *no unexpected changes will be made. |
- | |
| 67 | */ |
65 | */ |
| 68 | rr.word = rr_read(VRN_KERNEL); |
66 | rr.word = rr_read(VRN_KERNEL); |
| 69 | rr.map.ve = 0; /* disable VHPT walker */ |
67 | rr.map.ve = 0; /* disable VHPT walker */ |
| 70 | rr.map.ps = PAGE_WIDTH; |
68 | rr.map.ps = PAGE_WIDTH; |
| 71 | rr.map.rid = ASID2RID(ASID_KERNEL,VRN_KERNEL); |
69 | rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL); |
| 72 | rr_write(VRN_KERNEL, rr.word); |
70 | rr_write(VRN_KERNEL, rr.word); |
| 73 | srlz_i(); |
71 | srlz_i(); |
| 74 | srlz_d(); |
72 | srlz_d(); |
| 75 | 73 | ||
| 76 | /* |
74 | /* |
| 77 | * And invalidate the rest of region register. |
75 | * And invalidate the rest of region register. |
| 78 | */ |
76 | */ |
| 79 | for(i = 0; i < REGION_REGISTERS; i++) { |
77 | for(i = 0; i < REGION_REGISTERS; i++) { |
| 80 | /* skip kernel rr */ |
78 | /* skip kernel rr */ |
| 81 | if (i == VRN_KERNEL) |
79 | if (i == VRN_KERNEL) |
| 82 | continue; |
80 | continue; |
| 83 | 81 | ||
| 84 | rr.word == rr_read(i); |
82 | rr.word == rr_read(i); |
| 85 | rr.map.ve = 0; /* disable VHPT walker */ |
83 | rr.map.ve = 0; /* disable VHPT walker */ |
| 86 | rr.map.rid = ASID2RID(ASID_INVALID,i); |
84 | rr.map.rid = RID_INVALID; |
| 87 | rr_write(i, rr.word); |
85 | rr_write(i, rr.word); |
| 88 | srlz_i(); |
86 | srlz_i(); |
| 89 | srlz_d(); |
87 | srlz_d(); |
| 90 | } |
88 | } |
| 91 | 89 | ||
| Line 98... | Line 96... | ||
| 98 | pta.map.size = VHPT_WIDTH; |
96 | pta.map.size = VHPT_WIDTH; |
| 99 | pta.map.base = VHPT_BASE >> PTA_BASE_SHIFT; |
97 | pta.map.base = VHPT_BASE >> PTA_BASE_SHIFT; |
| 100 | pta_write(pta.word); |
98 | pta_write(pta.word); |
| 101 | srlz_i(); |
99 | srlz_i(); |
| 102 | srlz_d(); |
100 | srlz_d(); |
| 103 | - | ||
| 104 | - | ||
| 105 | return ; |
- | |
| 106 | - | ||
| 107 | } |
101 | } |
| 108 | 102 | ||
| 109 | /** Calculate address of collision chain from VPN and ASID. |
103 | /** Calculate address of collision chain from VPN and ASID. |
| 110 | * |
104 | * |
| 111 | * Interrupts must be disabled. |
105 | * Interrupts must be disabled. |