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 */
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 */
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#ifndef __ia64_PAGE_H__
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#ifndef __ia64_PAGE_H__
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#define __ia64_PAGE_H__
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#define __ia64_PAGE_H__
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#ifndef __ASM__
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#include <arch/mm/frame.h>
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#include <arch/barrier.h>
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#include <genarch/mm/page_ht.h>
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#include <arch/mm/asid.h>
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#include <arch/types.h>
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#include <typedefs.h>
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#include <debug.h>
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#endif
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#define PAGE_SIZE   FRAME_SIZE
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#define PAGE_SIZE   FRAME_SIZE
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#define PAGE_WIDTH  FRAME_WIDTH
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#define PAGE_WIDTH  FRAME_WIDTH
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#define KERNEL_PAGE_WIDTH   28
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/** Bit width of the TLB-locked portion of kernel address space. */
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#define KERNEL_PAGE_WIDTH   28  /* 256M */
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#define SET_PTL0_ADDRESS_ARCH(x)    /**< To be removed as situation permits. */
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#define SET_PTL0_ADDRESS_ARCH(x)    /**< To be removed as situation permits. */
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#define PPN_SHIFT           12
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#define PPN_SHIFT           12
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#define VRN_SHIFT           61
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#define VRN_SHIFT           61
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#define VRN_MASK            (7LL << VRN_SHIFT)
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#define VRN_MASK            (7LL << VRN_SHIFT)
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#define VA2VRN(va)          ((va)>>VRN_SHIFT)
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#ifdef __ASM__
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#ifdef __ASM__
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#define VRN_KERNEL          7
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#define VRN_KERNEL          7
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#else
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#else
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#define VRN_KERNEL          7LL
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#define VRN_KERNEL          7LL
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#define REGION_REGISTERS        8
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#define REGION_REGISTERS        8
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#define KA2PA(x)    ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))
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#define KA2PA(x)    ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))
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#define PA2KA(x)    ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))
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#define PA2KA(x)    ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))
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#define VHPT_WIDTH          20          /* 1M */
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#define VHPT_WIDTH          20          /* 1M */
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#define VHPT_SIZE           (1 << VHPT_WIDTH)
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#define VHPT_SIZE           (1 << VHPT_WIDTH)
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#define VHPT_BASE           0       /* Must be aligned to VHPT_SIZE */
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#define VHPT_BASE           0       /* Must be aligned to VHPT_SIZE */
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#define PTA_BASE_SHIFT          15
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#define PTA_BASE_SHIFT          15
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/* Access Rigths. Only certain combinations are used by the kernel. */
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/* Access Rigths. Only certain combinations are used by the kernel. */
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#define AR_READ     0x0
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#define AR_READ     0x0
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#define AR_EXECUTE  0x1
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#define AR_EXECUTE  0x1
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#define AR_WRITE    0x2
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#define AR_WRITE    0x2
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#define VA_REGION_INDEX 61
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#define VA_REGION(va) (va>>VA_REGION_INDEX)
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#ifndef __ASM__
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#ifndef __ASM__
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#include <arch/mm/frame.h>
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#include <arch/barrier.h>
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#include <genarch/mm/page_ht.h>
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#include <arch/mm/asid.h>
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#include <arch/types.h>
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#include <typedefs.h>
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#include <debug.h>
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struct vhpt_tag_info {
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struct vhpt_tag_info {
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    unsigned long long tag : 63;
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    unsigned long long tag : 63;
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    unsigned ti : 1;
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    unsigned ti : 1;
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} __attribute__ ((packed));
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} __attribute__ ((packed));
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    struct vhpt_entry_present present;
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    struct vhpt_entry_present present;
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    struct vhpt_entry_not_present not_present;
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    struct vhpt_entry_not_present not_present;
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    __u64 word[4];
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    __u64 word[4];
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} vhpt_entry_t;
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} vhpt_entry_t;
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typedef vhpt_entry_t tlb_entry_t;
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struct region_register_map {
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struct region_register_map {
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    unsigned ve : 1;
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    unsigned ve : 1;
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    unsigned : 1;
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    unsigned : 1;
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    unsigned ps : 6;
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    unsigned ps : 6;
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    unsigned rid : 24;
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    unsigned rid : 24;
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 */
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 */
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static inline __u64 rr_read(index_t i)
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static inline __u64 rr_read(index_t i)
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{
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{
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    __u64 ret;
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    __u64 ret;
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    ASSERT(i < REGION_REGISTERS);
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    ASSERT(i < REGION_REGISTERS);
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    i=i<<VRN_SHIFT;
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    __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i));
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    __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
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    return ret;
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    return ret;
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}
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}
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/** Write Region Register.
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/** Write Region Register.
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 *
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 *
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 * @param i Region register index.
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 * @param i Region register index.
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 * @param v Value to be written to rr[i].
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 * @param v Value to be written to rr[i].
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 */
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 */
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static inline void rr_write(index_t i, __u64 v)
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static inline void rr_write(index_t i, __u64 v)
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{
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{
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    ASSERT(i < REGION_REGISTERS);
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    ASSERT(i < REGION_REGISTERS);
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    i=i<<VRN_SHIFT;
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    __asm__ volatile (
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    __asm__ volatile (
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    "mov rr[%0] = %1;;\n"
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        "mov rr[%0] = %1\n"
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    :
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        :
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    : "r" (i), "r" (v));
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        : "r" (i << VRN_SHIFT), "r" (v)
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    );
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}
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}
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/** Read Page Table Register.
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/** Read Page Table Register.
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 *
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 *
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 * @return Current value stored in PTA.
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 * @return Current value stored in PTA.
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extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);
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extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);
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extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);
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extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);
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extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);
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extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);
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#endif
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#endif
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#endif
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#endif
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