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Line 50... Line 50...
50 
 * whole memory. One is for code and one is for data.
 50 
 * whole memory. One is for code and one is for data.
51 
 *
 51 
 *
52 
 * One is for GS register which holds pointer to the TLS thread
 52 
 * One is for GS register which holds pointer to the TLS thread
53 
 * structure in it's base.
 53 
 * structure in it's base.
54 
 */
 54 
 */
55 
struct descriptor gdt[GDT_ITEMS] = {
 55 
descriptor_t gdt[GDT_ITEMS] = {
56 
    /* NULL descriptor */
 56 
    /* NULL descriptor */
57 
    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
 57 
    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
58 
    /* KTEXT descriptor */
 58 
    /* KTEXT descriptor */
59 
    { 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
 59 
    { 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 1, 1, 0 },
60 
    /* KDATA descriptor */
 60 
    /* KDATA descriptor */
Line 66... Line 66...
66 
    /* TSS descriptor - set up will be completed later */
 66 
    /* TSS descriptor - set up will be completed later */
67 
    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
 67 
    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
68 
    { 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 }
 68 
    { 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 }
69 
};
 69 
};
70 
 
 70 
 
71 
static struct idescriptor idt[IDT_ITEMS];
 71 
static idescriptor_t idt[IDT_ITEMS];
72 
 
 72 
 
73 
static struct tss tss;
 73 
static tss_t tss;
74 
 
 74 
 
75 
struct tss *tss_p = NULL;
 75 
tss_t *tss_p = NULL;
76 
 
 76 
 
77 
/* gdtr is changed by kmp before next CPU is initialized */
 77 
/* gdtr is changed by kmp before next CPU is initialized */
78 
struct ptr_16_32 bootstrap_gdtr = { .limit = sizeof(gdt), .base = KA2PA((__address) gdt) };
 78 
ptr_16_32_t bootstrap_gdtr = { .limit = sizeof(gdt), .base = KA2PA((__address) gdt) };
79 
struct ptr_16_32 gdtr = { .limit = sizeof(gdt), .base = (__address) gdt };
 79 
ptr_16_32_t gdtr = { .limit = sizeof(gdt), .base = (__address) gdt };
80 
 
 80 
 
81 
void gdt_setbase(struct descriptor *d, __address base)
 81 
void gdt_setbase(descriptor_t *d, __address base)
82 
{
 82 
{
83 
    d->base_0_15 = base & 0xffff;
 83 
    d->base_0_15 = base & 0xffff;
84 
    d->base_16_23 = ((base) >> 16) & 0xff;
 84 
    d->base_16_23 = ((base) >> 16) & 0xff;
85 
    d->base_24_31 = ((base) >> 24) & 0xff;
 85 
    d->base_24_31 = ((base) >> 24) & 0xff;
86 
}
 86 
}
87 
 
 87 
 
88 
void gdt_setlimit(struct descriptor *d, __u32 limit)
 88 
void gdt_setlimit(descriptor_t *d, __u32 limit)
89 
{
 89 
{
90 
    d->limit_0_15 = limit & 0xffff;
 90 
    d->limit_0_15 = limit & 0xffff;
91 
    d->limit_16_19 = (limit >> 16) & 0xf;
 91 
    d->limit_16_19 = (limit >> 16) & 0xf;
92 
}
 92 
}
93 
 
 93 
 
94 
void idt_setoffset(struct idescriptor *d, __address offset)
 94 
void idt_setoffset(idescriptor_t *d, __address offset)
95 
{
 95 
{
96 
    /*
 96 
    /*
97 
     * Offset is a linear address.
 97 
     * Offset is a linear address.
98 
     */
 98 
     */
99 
    d->offset_0_15 = offset & 0xffff;
 99 
    d->offset_0_15 = offset & 0xffff;
100 
    d->offset_16_31 = offset >> 16;
 100 
    d->offset_16_31 = offset >> 16;
101 
}
 101 
}
102 
 
 102 
 
103 
void tss_initialize(struct tss *t)
 103 
void tss_initialize(tss_t *t)
104 
{
 104 
{
105 
    memsetb((__address) t, sizeof(struct tss), 0);
 105 
    memsetb((__address) t, sizeof(struct tss), 0);
106 
}
 106 
}
107 
 
 107 
 
108 
/*
 108 
/*
109 
 * This function takes care of proper setup of IDT and IDTR.
 109 
 * This function takes care of proper setup of IDT and IDTR.
110 
 */
 110 
 */
111 
void idt_init(void)
 111 
void idt_init(void)
112 
{
 112 
{
113 
    struct idescriptor *d;
 113 
    idescriptor_t *d;
114 
    int i;
 114 
    int i;
115 
 
 115 
 
116 
    for (i = 0; i < IDT_ITEMS; i++) {
 116 
    for (i = 0; i < IDT_ITEMS; i++) {
117 
        d = &idt[i];
 117 
        d = &idt[i];
118 
 
 118 
 
Line 139... Line 139...
139 
 
 139 
 
140 
 
 140 
 
141 
/* Clean IOPL(12,13) and NT(14) flags in EFLAGS register */
 141 
/* Clean IOPL(12,13) and NT(14) flags in EFLAGS register */
142 
static void clean_IOPL_NT_flags(void)
 142 
static void clean_IOPL_NT_flags(void)
143 
{
 143 
{
144 
    asm
 144 
    __asm__ volatile (
145 
    (
 - 
 
146 
        "pushfl;"
 145 
        "pushfl\n"
147 
        "pop %%eax;"
 146 
        "pop %%eax\n"
148 
        "and $0xffff8fff,%%eax;"
 147 
        "and $0xffff8fff, %%eax\n"
149 
        "push %%eax;"
 148 
        "push %%eax\n"
150 
        "popfl;"
 149 
        "popfl\n"
151 
        :
 - 
 
152 
        :
 - 
 
153 
        :"%eax"
 150 
        : : : "eax"
154 
    );
 151 
    );
155 
}
 152 
}
156 
 
 153 
 
157 
/* Clean AM(18) flag in CR0 register */
 154 
/* Clean AM(18) flag in CR0 register */
158 
static void clean_AM_flag(void)
 155 
static void clean_AM_flag(void)
159 
{
 156 
{
160 
    asm
 157 
    __asm__ volatile (
161 
    (
 - 
 
162 
        "mov %%cr0,%%eax;"
 158 
        "mov %%cr0, %%eax\n"
163 
        "and $0xFFFBFFFF,%%eax;"
 159 
        "and $0xfffbffff, %%eax\n"
164 
        "mov %%eax,%%cr0;"
 160 
        "mov %%eax, %%cr0\n"
165 
        :
 - 
 
166 
        :
 - 
 
167 
        :"%eax"
 161 
        : : : "eax"
168 
    );
 162 
    );
169 
}
 163 
}
170 
 
 164 
 
171 
void pm_init(void)
 165 
void pm_init(void)
172 
{
 166 
{
173 
    struct descriptor *gdt_p = (struct descriptor *) gdtr.base;
 167 
    descriptor_t *gdt_p = (descriptor_t *) gdtr.base;
174 
    struct ptr_16_32 idtr;
 168 
    ptr_16_32_t idtr;
175 
 
 169 
 
176 
    /*
 170 
    /*
177 
     * Update addresses in GDT and IDT to their virtual counterparts.
 171 
     * Update addresses in GDT and IDT to their virtual counterparts.
178 
     */
 172 
     */
179 
    idtr.limit = sizeof(idt);
 173 
    idtr.limit = sizeof(idt);
Line 193... Line 187...
193 
         * the heap hasn't been initialized so far.
 187 
         * the heap hasn't been initialized so far.
194 
         */
 188 
         */
195 
        tss_p = &tss;
 189 
        tss_p = &tss;
196 
    }
 190 
    }
197 
    else {
 191 
    else {
198 
        tss_p = (struct tss *) malloc(sizeof(struct tss),FRAME_ATOMIC);
 192 
        tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC);
199 
        if (!tss_p)
 193 
        if (!tss_p)
200 
            panic("could not allocate TSS\n");
 194 
            panic("could not allocate TSS\n");
201 
    }
 195 
    }
202 
 
 196 
 
203 
    tss_initialize(tss_p);
 197 
    tss_initialize(tss_p);
Line 205... Line 199...
205 
    gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
 199 
    gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
206 
    gdt_p[TSS_DES].special = 1;
 200 
    gdt_p[TSS_DES].special = 1;
207 
    gdt_p[TSS_DES].granularity = 1;
 201 
    gdt_p[TSS_DES].granularity = 1;
208 
   
 202 
   
209 
    gdt_setbase(&gdt_p[TSS_DES], (__address) tss_p);
 203 
    gdt_setbase(&gdt_p[TSS_DES], (__address) tss_p);
210 
    gdt_setlimit(&gdt_p[TSS_DES], sizeof(struct tss) - 1);
 204 
    gdt_setlimit(&gdt_p[TSS_DES], sizeof(tss_t) - 1);
211 
 
 205 
 
212 
    /*
 206 
    /*
213 
     * As of this moment, the current CPU has its own GDT pointing
 207 
     * As of this moment, the current CPU has its own GDT pointing
214 
     * to its own TSS. We just need to load the TR register.
 208 
     * to its own TSS. We just need to load the TR register.
215 
     */
 209 
     */
Line 219... Line 213...
219 
    clean_AM_flag();          /* Disable alignment check */
 213 
    clean_AM_flag();          /* Disable alignment check */
220 
}
 214 
}
221 
 
 215 
 
222 
void set_tls_desc(__address tls)
 216 
void set_tls_desc(__address tls)
223 
{
 217 
{
224 
    struct ptr_16_32 cpugdtr;
 218 
    ptr_16_32_t cpugdtr;
225 
    struct descriptor *gdt_p = (struct descriptor *) cpugdtr.base;
 219 
    descriptor_t *gdt_p = (descriptor_t *) cpugdtr.base;
226 
 
 220 
 
227 
    gdtr_store(&cpugdtr);
 221 
    gdtr_store(&cpugdtr);
228 
    gdt_setbase(&gdt_p[TLS_DES], tls);
 222 
    gdt_setbase(&gdt_p[TLS_DES], tls);
229 
    /* Reload gdt register to update GS in CPU */
 223 
    /* Reload gdt register to update GS in CPU */
230 
    gdtr_load(&cpugdtr);
 224 
    gdtr_load(&cpugdtr);