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90 | 90 | ||
91 | 91 | ||
92 | 92 | ||
93 | void cpu_arch_init(void) |
93 | void cpu_arch_init(void) |
94 | { |
94 | { |
- | 95 | __u32 help=0; |
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- | 96 | ||
95 | CPU->arch.tss = tss_p; |
97 | CPU->arch.tss = tss_p; |
96 | CPU->fpu_owner=NULL; |
98 | CPU->fpu_owner=NULL; |
- | 99 | ||
- | 100 | cpuid_feature_info fi; |
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- | 101 | cpuid_extended_feature_info efi; |
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- | 102 | ||
- | 103 | cpu_info_t info; |
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- | 104 | cpuid(1, &info); |
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- | 105 | ||
- | 106 | fi.word=info.cpuid_edx; |
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- | 107 | efi.word=info.cpuid_ecx; |
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- | 108 | ||
- | 109 | if(fi.bits.fxsr) fpu_fxsr(); |
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- | 110 | else fpu_fsr(); |
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- | 111 | ||
- | 112 | if(fi.bits.sse) asm volatile ( |
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- | 113 | "mov %%cr4,%0;\n" |
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- | 114 | "or %1,%0;\n" |
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- | 115 | "mov %0,%%cr4;\n" |
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- | 116 | :"+r"(help) |
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- | 117 | :"i"(CR4_OSFXSR_MASK|(1<<10)) |
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- | 118 | ); |
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- | 119 | ||
97 | } |
120 | } |
98 | 121 | ||
99 | 122 | ||
100 | void cpu_identify(void) |
123 | void cpu_identify(void) |
101 | { |
124 | { |