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| Rev 534 | Rev 1434 | ||
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| Line 27... | Line 27... | ||
| 27 | */ |
27 | */ |
| 28 | 28 | ||
| 29 | #ifndef __ia32_BARRIER_H__ |
29 | #ifndef __ia32_BARRIER_H__ |
| 30 | #define __ia32_BARRIER_H__ |
30 | #define __ia32_BARRIER_H__ |
| 31 | 31 | ||
| 32 | #include <arch/types.h> |
- | |
| 33 | - | ||
| 34 | /* |
32 | /* |
| 35 | * NOTE: |
33 | * NOTE: |
| 36 | * No barriers for critical section (i.e. spinlock) on IA-32 are needed: |
34 | * No barriers for critical section (i.e. spinlock) on IA-32 are needed: |
| 37 | * - spinlock_lock() and spinlock_trylock() use serializing XCHG instruction |
35 | * - spinlock_lock() and spinlock_trylock() use serializing XCHG instruction |
| 38 | * - writes cannot pass reads on IA-32 => spinlock_unlock() needs no barriers |
36 | * - writes cannot pass reads on IA-32 => spinlock_unlock() needs no barriers |
| Line 58... | Line 56... | ||
| 58 | # define memory_barrier() __asm__ volatile ("mfence\n" ::: "memory") |
56 | # define memory_barrier() __asm__ volatile ("mfence\n" ::: "memory") |
| 59 | # define read_barrier() __asm__ volatile ("lfence\n" ::: "memory") |
57 | # define read_barrier() __asm__ volatile ("lfence\n" ::: "memory") |
| 60 | # ifdef CONFIG_WEAK_MEMORY |
58 | # ifdef CONFIG_WEAK_MEMORY |
| 61 | # define write_barrier() __asm__ volatile ("sfence\n" ::: "memory") |
59 | # define write_barrier() __asm__ volatile ("sfence\n" ::: "memory") |
| 62 | # else |
60 | # else |
| 63 | # define write_barrier() |
61 | # define write_barrier() __asm__ volatile( "" ::: "memory"); |
| 64 | # endif |
62 | # endif |
| 65 | #elif CONFIG_FENCES_P3 |
63 | #elif CONFIG_FENCES_P3 |
| 66 | # define memory_barrier() cpuid_serialization() |
64 | # define memory_barrier() cpuid_serialization() |
| 67 | # define read_barrier() cpuid_serialization() |
65 | # define read_barrier() cpuid_serialization() |
| 68 | # ifdef CONFIG_WEAK_MEMORY |
66 | # ifdef CONFIG_WEAK_MEMORY |
| 69 | # define write_barrier() __asm__ volatile ("sfence\n" ::: "memory") |
67 | # define write_barrier() __asm__ volatile ("sfence\n" ::: "memory") |
| 70 | # else |
68 | # else |
| 71 | # define write_barrier() |
69 | # define write_barrier() __asm__ volatile( "" ::: "memory"); |
| 72 | # endif |
70 | # endif |
| 73 | #else |
71 | #else |
| 74 | # define memory_barrier() cpuid_serialization() |
72 | # define memory_barrier() cpuid_serialization() |
| 75 | # define read_barrier() cpuid_serialization() |
73 | # define read_barrier() cpuid_serialization() |
| 76 | # ifdef CONFIG_WEAK_MEMORY |
74 | # ifdef CONFIG_WEAK_MEMORY |
| 77 | # define write_barrier() cpuid_serialization() |
75 | # define write_barrier() cpuid_serialization() |
| 78 | # else |
76 | # else |
| 79 | # define write_barrier() |
77 | # define write_barrier() __asm__ volatile( "" ::: "memory"); |
| 80 | # endif |
78 | # endif |
| 81 | #endif |
79 | #endif |
| 82 | 80 | ||
| 83 | #endif |
81 | #endif |