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Rev 1252 | Rev 1289 | ||
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Line 106... | Line 106... | ||
106 | .granularity = 1, |
106 | .granularity = 1, |
107 | .base_24_31 = 0 }, |
107 | .base_24_31 = 0 }, |
108 | /* TSS descriptor - set up will be completed later, |
108 | /* TSS descriptor - set up will be completed later, |
109 | * on AMD64 it is 64-bit - 2 items in table */ |
109 | * on AMD64 it is 64-bit - 2 items in table */ |
110 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, |
110 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, |
111 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } |
111 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, |
- | 112 | /* VESA Init descriptor */ |
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- | 113 | { 0xffff, 0, VESA_INIT_SEGMENT>>12, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 0, 0, 0 } |
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112 | }; |
114 | }; |
113 | 115 | ||
114 | idescriptor_t idt[IDT_ITEMS]; |
116 | idescriptor_t idt[IDT_ITEMS]; |
115 | 117 | ||
116 | ptr_16_64_t gdtr = {.limit = sizeof(gdt), .base= (__u64) gdt }; |
118 | ptr_16_64_t gdtr = {.limit = sizeof(gdt), .base= (__u64) gdt }; |