Rev 3124 | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 3124 | Rev 3126 | ||
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Line 52... | Line 52... | ||
52 | /* Branch */ |
52 | /* Branch */ |
53 | OP_B, |
53 | OP_B, |
54 | OP_BL, |
54 | OP_BL, |
55 | OP_BLX1, |
55 | OP_BLX1, |
56 | OP_BLX2, |
56 | OP_BLX2, |
57 | OP_BX |
57 | OP_BX, |
- | 58 | ||
- | 59 | OP_MOV_PC_LR |
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58 | } op_t; |
60 | } op_t; |
59 | 61 | ||
60 | typedef struct { |
62 | typedef struct { |
61 | uint32_t mask; |
63 | uint32_t mask; |
62 | uint32_t value; |
64 | uint32_t value; |
Line 76... | Line 78... | ||
76 | 78 | ||
77 | /* Branch (and link) */ |
79 | /* Branch (and link) */ |
78 | { 0x0f000000, 0x0a000000, OP_B }, |
80 | { 0x0f000000, 0x0a000000, OP_B }, |
79 | { 0x0f000000, 0x0b000000, OP_BL }, |
81 | { 0x0f000000, 0x0b000000, OP_BL }, |
80 | 82 | ||
- | 83 | /* mov pc, lr */ |
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- | 84 | { 0xffffffff, 0xe1a0f00e, OP_MOV_PC_LR }, |
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- | 85 | ||
81 | { 0, 0, -1 } |
86 | { 0, 0, -1 } |
82 | }; |
87 | }; |
83 | 88 | ||
84 | /** Sign-extend a value to 32 bits. |
89 | /** Sign-extend a value to 32 bits. |
85 | * |
90 | * |
Line 230... | Line 235... | ||
230 | buffer[0] = regv & ~0x1; |
235 | buffer[0] = regv & ~0x1; |
231 | buffer[1] = addr + 4; |
236 | buffer[1] = addr + 4; |
232 | n = 2; |
237 | n = 2; |
233 | break; |
238 | break; |
234 | 239 | ||
- | 240 | case OP_MOV_PC_LR: |
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- | 241 | /* mov pc, lr - this is typically used as 'return' */ |
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- | 242 | rc = get_reg(dt, 14 /* lr */, ®v); |
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- | 243 | if (rc != 0) return rc; |
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- | 244 | ||
- | 245 | buffer[0] = regv & ~0x1; |
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- | 246 | printf("mov pc, lr ---> 0x%x\n", buffer[0]); |
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- | 247 | n = 1; |
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- | 248 | break; |
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- | 249 | ||
235 | /* TODO: handle instructions writing r15 */ |
250 | /* TODO: handle general case of instructions writing r15(pc) */ |
236 | 251 | ||
237 | default: |
252 | default: |
238 | /* Regular instruction */ |
253 | /* Regular instruction */ |
239 | buffer[0] = addr + 4; |
254 | buffer[0] = addr + 4; |
240 | n = 1; |
255 | n = 1; |