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Rev 3425 Rev 4377
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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/** @addtogroup ia32   
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/** @addtogroup ia32
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 * @{
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 * @{
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 */
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 */
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/** @file
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/** @file
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 */
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 */
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    }
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    }
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    l_apic_address = (uintptr_t) frame_alloc(ONE_FRAME,
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    l_apic_address = (uintptr_t) frame_alloc(ONE_FRAME,
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        FRAME_ATOMIC | FRAME_KA);
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        FRAME_ATOMIC | FRAME_KA);
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    if (!l_apic_address)
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    if (!l_apic_address)
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        panic("cannot allocate address for l_apic\n");
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        panic("Cannot allocate address for l_apic.");
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    io_apic_address = (uintptr_t) frame_alloc(ONE_FRAME,
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    io_apic_address = (uintptr_t) frame_alloc(ONE_FRAME,
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        FRAME_ATOMIC | FRAME_KA);
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        FRAME_ATOMIC | FRAME_KA);
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    if (!io_apic_address)
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    if (!io_apic_address)
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        panic("cannot allocate address for io_apic\n");
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        panic("Cannot allocate address for io_apic.");
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    if (config.cpu_count > 1) {    
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    if (config.cpu_count > 1) {    
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        page_mapping_insert(AS_KERNEL, l_apic_address,
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        page_mapping_insert(AS_KERNEL, l_apic_address,
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            (uintptr_t) l_apic, PAGE_NOT_CACHEABLE | PAGE_WRITE);
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            (uintptr_t) l_apic, PAGE_NOT_CACHEABLE | PAGE_WRITE);
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        page_mapping_insert(AS_KERNEL, io_apic_address,
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        page_mapping_insert(AS_KERNEL, io_apic_address,
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    /*
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    /*
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     * Save 0xa to address 0xf of the CMOS RAM.
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     * Save 0xa to address 0xf of the CMOS RAM.
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     * BIOS will not do the POST after the INIT signal.
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     * BIOS will not do the POST after the INIT signal.
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     */
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     */
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    outb(0x70, 0xf);
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    pio_write_8((ioport8_t *)0x70, 0xf);
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    outb(0x71, 0xa);
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    pio_write_8((ioport8_t *)0x71, 0xa);
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    pic_disable_irqs(0xffff);
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    pic_disable_irqs(0xffff);
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    apic_init();
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    apic_init();
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    uint8_t apic = l_apic_id();
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    uint8_t apic = l_apic_id();
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    for (i = 0; i < ops->cpu_count(); i++) {
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    for (i = 0; i < ops->cpu_count(); i++) {
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        struct descriptor *gdt_new;
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        descriptor_t *gdt_new;
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        /*
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        /*
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         * Skip processors marked unusable.
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         * Skip processors marked unusable.
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         */
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         */
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        if (!ops->cpu_enabled(i))
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        if (!ops->cpu_enabled(i))
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            continue;
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            continue;
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        }
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        }
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        /*
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        /*
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         * Prepare new GDT for CPU in question.
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         * Prepare new GDT for CPU in question.
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         */
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         */
-
 
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-
 
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        /* XXX Flag FRAME_LOW_4_GiB was removed temporarily,
-
 
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         * it needs to be replaced by a generic fuctionality of
-
 
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         * the memory subsystem
-
 
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         */
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        gdt_new = (struct descriptor *) malloc(GDT_ITEMS *
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        gdt_new = (descriptor_t *) malloc(GDT_ITEMS *
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            sizeof(struct descriptor), FRAME_ATOMIC | FRAME_LOW_4_GiB);
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            sizeof(descriptor_t), FRAME_ATOMIC);
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        if (!gdt_new)
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        if (!gdt_new)
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            panic("couldn't allocate memory for GDT\n");
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            panic("Cannot allocate memory for GDT.");
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        memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor));
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        memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(descriptor_t));
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        memsetb(&gdt_new[TSS_DES], sizeof(struct descriptor), 0);
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        memsetb(&gdt_new[TSS_DES], sizeof(descriptor_t), 0);
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        protected_ap_gdtr.limit = GDT_ITEMS * sizeof(struct descriptor);
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        protected_ap_gdtr.limit = GDT_ITEMS * sizeof(descriptor_t);
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        protected_ap_gdtr.base = KA2PA((uintptr_t) gdt_new);
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        protected_ap_gdtr.base = KA2PA((uintptr_t) gdt_new);
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        gdtr.base = (uintptr_t) gdt_new;
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        gdtr.base = (uintptr_t) gdt_new;
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        if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
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        if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
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            /*
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            /*