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Rev 3993 Rev 4129
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static inline void mmu_secondary_context_write(uint64_t v)
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static inline void mmu_secondary_context_write(uint64_t v)
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{
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{
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    asi_u64_write(ASI_SECONDARY_CONTEXT_REG, VA_SECONDARY_CONTEXT_REG, v);
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    asi_u64_write(ASI_SECONDARY_CONTEXT_REG, VA_SECONDARY_CONTEXT_REG, v);
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}
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}
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/** Perform IMMU TLB Demap Operation.
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 *
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 * @param type      Selects between context and page demap (and entire MMU
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 *          demap on US3).
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 * @param context_encoding Specifies which Context register has Context ID for
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 *          demap.
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 * @param page      Address which is on the page to be demapped.
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 */
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static inline void itlb_demap(int type, int context_encoding, uintptr_t page)
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{
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}
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/** Perform DMMU TLB Demap Operation.
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 *
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 * @param type      One of TLB_DEMAP_PAGE and TLB_DEMAP_CONTEXT. Selects
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 *          between context and page demap.
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 * @param context_encoding Specifies which Context register has Context ID for
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 *          demap.
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 * @param page      Address which is on the page to be demapped.
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 */
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static inline void dtlb_demap(int type, int context_encoding, uintptr_t page)
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{
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    #if 0
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         - this implementation is not correct!!!
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    if (type == TLB_DEMAP_PAGE) {
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        __hypercall_fast5(
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            MMU_DEMAP_PAGE, 0, 0,
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            page, context_encoding, MMU_FLAG_DTLB);
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    } else if (type == TLB_DEMAP_CONTEXT) {
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        __hypercall_fast4(
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            MMU_DEMAP_CTX, 0, 0,
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            context_encoding, MMU_FLAG_DTLB);
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    }
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    #endif
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}
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/**
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/**
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 * Demaps all mappings in a context.
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 * Demaps all mappings in a context.
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 *
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 *
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 * @param context   number of the context
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 * @param context   number of the context
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 * @param mmu_flag  MMU_FLAG_DTLB, MMU_FLAG_ITLB or a combination of both
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 * @param mmu_flag  MMU_FLAG_DTLB, MMU_FLAG_ITLB or a combination of both
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 */
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 */
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static inline void mmu_demap_ctx(int context, int mmu_flag) {
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static inline void mmu_demap_ctx(int context, int mmu_flag) {
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    __hypercall_fast4(MMU_DEMAP_CTX, 0, 0, context, mmu_flag);
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    __hypercall_fast4(MMU_DEMAP_CTX, 0, 0, context, mmu_flag);
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}
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}
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/**
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 * Demaps given page.
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 *
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 * @param vaddr     VA of the page to be demapped
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 * @param context   number of the context
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 * @param mmu_flag  MMU_FLAG_DTLB, MMU_FLAG_ITLB or a combination of both
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 */
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static inline void mmu_demap_page(uintptr_t vaddr, int context, int mmu_flag) {
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static inline void mmu_demap_page(uintptr_t vaddr, int context, int mmu_flag) {
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    __hypercall_fast5(MMU_DEMAP_PAGE, 0, 0, vaddr, context, mmu_flag);
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    __hypercall_fast5(MMU_DEMAP_PAGE, 0, 0, vaddr, context, mmu_flag);
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}
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}
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/**
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 * Installs a locked TLB entry in kernel address space.
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 *
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 * @param vaddr     VA of the page to be demapped
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 * @param ra        real address the page is mapped to
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 * @param cacheable should the page be cacheble?
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 * @param privileged    should the mapping be privileged?
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 * @param executable    should the memory mapped be executable?
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 * @param writable  should the memory mapped be writable?
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 * @param size      code of the page size
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 * @param mmu_flag  MMU_FLAG_DTLB, MMU_FLAG_ITLB or a combination of both
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 */
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static inline void mmu_map_perm_addr(uintptr_t vaddr, uintptr_t ra,
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static inline void mmu_map_perm_addr(uintptr_t vaddr, uintptr_t ra,
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        bool cacheable, bool privileged, bool executable,
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        bool cacheable, bool privileged, bool executable,
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        bool writable, unsigned size, unsigned mmu_flags) {
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        bool writable, unsigned size, unsigned mmu_flags) {
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 157 
 
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    tte_data_t data;
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    tte_data_t data;
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extern void fast_data_access_mmu_miss(unative_t, istate_t *);
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extern void fast_data_access_mmu_miss(unative_t, istate_t *);
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extern void fast_data_access_protection(unative_t, istate_t *);
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extern void fast_data_access_protection(unative_t, istate_t *);
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 175 
 
193 
extern void dtlb_insert_mapping(uintptr_t, uintptr_t, int, bool, bool);
 176 
extern void dtlb_insert_mapping(uintptr_t, uintptr_t, int, bool, bool);
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 177 
 
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extern void describe_mmu_fault(void);
 178 
extern void describe_dmmu_fault(void);
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 179 
 
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#endif /* !def __ASM__ */
 180 
#endif /* !def __ASM__ */
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#endif
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#endif
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