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1 | /* |
1 | /* |
2 | * Copyright (c) 2006 Martin Decky |
2 | * Copyright (c) 2006 Martin Decky |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ia32xen_interrupt |
29 | /** @addtogroup ia32xen_interrupt |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch/interrupt.h> |
35 | #include <arch/interrupt.h> |
36 | #include <syscall/syscall.h> |
36 | #include <syscall/syscall.h> |
37 | #include <print.h> |
37 | #include <print.h> |
38 | #include <debug.h> |
38 | #include <debug.h> |
39 | #include <panic.h> |
39 | #include <panic.h> |
40 | #include <func.h> |
40 | #include <func.h> |
41 | #include <cpu.h> |
41 | #include <cpu.h> |
42 | #include <arch/asm.h> |
42 | #include <arch/asm.h> |
43 | #include <mm/tlb.h> |
43 | #include <mm/tlb.h> |
44 | #include <mm/as.h> |
44 | #include <mm/as.h> |
45 | #include <arch.h> |
45 | #include <arch.h> |
46 | #include <symtab.h> |
46 | #include <symtab.h> |
47 | #include <proc/thread.h> |
47 | #include <proc/thread.h> |
48 | #include <proc/task.h> |
48 | #include <proc/task.h> |
49 | #include <synch/spinlock.h> |
49 | #include <synch/spinlock.h> |
50 | #include <arch/ddi/ddi.h> |
50 | #include <arch/ddi/ddi.h> |
51 | #include <ipc/sysipc.h> |
51 | #include <ipc/sysipc.h> |
52 | #include <interrupt.h> |
52 | #include <interrupt.h> |
53 | #include <ddi/irq.h> |
53 | #include <ddi/irq.h> |
54 | 54 | ||
55 | /* |
55 | /* |
56 | * Interrupt and exception dispatching. |
56 | * Interrupt and exception dispatching. |
57 | */ |
57 | */ |
58 | 58 | ||
59 | void (* disable_irqs_function)(uint16_t irqmask) = NULL; |
59 | void (* disable_irqs_function)(uint16_t irqmask) = NULL; |
60 | void (* enable_irqs_function)(uint16_t irqmask) = NULL; |
60 | void (* enable_irqs_function)(uint16_t irqmask) = NULL; |
61 | void (* eoi_function)(void) = NULL; |
61 | void (* eoi_function)(void) = NULL; |
62 | 62 | ||
63 | void decode_istate(istate_t *istate) |
63 | void decode_istate(istate_t *istate) |
64 | { |
64 | { |
65 | char *symbol = get_symtab_entry(istate->eip); |
65 | char *symbol = get_symtab_entry(istate->eip); |
66 | 66 | ||
67 | if (!symbol) |
67 | if (!symbol) |
68 | symbol = ""; |
68 | symbol = ""; |
69 | 69 | ||
70 | if (CPU) |
70 | if (CPU) |
71 | printf("----------------EXCEPTION OCCURED (cpu%d)----------------\n", CPU->id); |
71 | printf("----------------EXCEPTION OCCURED (cpu%d)----------------\n", CPU->id); |
72 | else |
72 | else |
73 | printf("----------------EXCEPTION OCCURED----------------\n"); |
73 | printf("----------------EXCEPTION OCCURED----------------\n"); |
74 | 74 | ||
75 | printf("%%eip: %#x (%s)\n",istate->eip,symbol); |
75 | printf("%%eip: %#x (%s)\n",istate->eip,symbol); |
76 | printf("ERROR_WORD=%#x\n", istate->error_word); |
76 | printf("ERROR_WORD=%#x\n", istate->error_word); |
77 | printf("%%cs=%#x,flags=%#x\n", istate->cs, istate->eflags); |
77 | printf("%%cs=%#x,flags=%#x\n", istate->cs, istate->eflags); |
78 | printf("%%eax=%#x, %%ecx=%#x, %%edx=%#x, %%esp=%#x\n", istate->eax,istate->ecx,istate->edx,&istate->stack[0]); |
78 | printf("%%eax=%#x, %%ecx=%#x, %%edx=%#x, %%esp=%#x\n", istate->eax,istate->ecx,istate->edx,&istate->stack[0]); |
79 | #ifdef CONFIG_DEBUG_ALLREGS |
79 | #ifdef CONFIG_DEBUG_ALLREGS |
80 | printf("%%esi=%#x, %%edi=%#x, %%ebp=%#x, %%ebx=%#x\n", istate->esi,istate->edi,istate->ebp,istate->ebx); |
80 | printf("%%esi=%#x, %%edi=%#x, %%ebp=%#x, %%ebx=%#x\n", istate->esi,istate->edi,istate->ebp,istate->ebx); |
81 | #endif |
81 | #endif |
82 | printf("stack: %#x, %#x, %#x, %#x\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]); |
82 | printf("stack: %#x, %#x, %#x, %#x\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]); |
83 | printf(" %#x, %#x, %#x, %#x\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]); |
83 | printf(" %#x, %#x, %#x, %#x\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]); |
84 | } |
84 | } |
85 | 85 | ||
86 | static void trap_virtual_eoi(void) |
86 | static void trap_virtual_eoi(void) |
87 | { |
87 | { |
88 | if (eoi_function) |
88 | if (eoi_function) |
89 | eoi_function(); |
89 | eoi_function(); |
90 | else |
90 | else |
91 | panic("no eoi_function\n"); |
91 | panic("no eoi_function\n"); |
92 | 92 | ||
93 | } |
93 | } |
94 | 94 | ||
95 | static void null_interrupt(int n, istate_t *istate) |
95 | static void null_interrupt(int n, istate_t *istate) |
96 | { |
96 | { |
97 | fault_if_from_uspace(istate, "unserviced interrupt: %d", n); |
97 | fault_if_from_uspace(istate, "unserviced interrupt: %d", n); |
98 | 98 | ||
99 | decode_istate(istate); |
99 | decode_istate(istate); |
100 | panic("unserviced interrupt: %d\n", n); |
100 | panic("unserviced interrupt: %d\n", n); |
101 | } |
101 | } |
102 | 102 | ||
103 | /** General Protection Fault. */ |
103 | /** General Protection Fault. */ |
104 | static void gp_fault(int n, istate_t *istate) |
104 | static void gp_fault(int n, istate_t *istate) |
105 | { |
105 | { |
106 | if (TASK) { |
106 | if (TASK) { |
107 | count_t ver; |
107 | count_t ver; |
108 | 108 | ||
109 | spinlock_lock(&TASK->lock); |
109 | spinlock_lock(&TASK->lock); |
110 | ver = TASK->arch.iomapver; |
110 | ver = TASK->arch.iomapver; |
111 | spinlock_unlock(&TASK->lock); |
111 | spinlock_unlock(&TASK->lock); |
112 | 112 | ||
113 | if (CPU->arch.iomapver_copy != ver) { |
113 | if (CPU->arch.iomapver_copy != ver) { |
114 | /* |
114 | /* |
115 | * This fault can be caused by an early access |
115 | * This fault can be caused by an early access |
116 | * to I/O port because of an out-dated |
116 | * to I/O port because of an out-dated |
117 | * I/O Permission bitmap installed on CPU. |
117 | * I/O Permission bitmap installed on CPU. |
118 | * Install the fresh copy and restart |
118 | * Install the fresh copy and restart |
119 | * the instruction. |
119 | * the instruction. |
120 | */ |
120 | */ |
121 | io_perm_bitmap_install(); |
121 | io_perm_bitmap_install(); |
122 | return; |
122 | return; |
123 | } |
123 | } |
124 | fault_if_from_uspace(istate, "general protection fault"); |
124 | fault_if_from_uspace(istate, "general protection fault"); |
125 | } |
125 | } |
126 | 126 | ||
127 | decode_istate(istate); |
127 | decode_istate(istate); |
128 | panic("general protection fault\n"); |
128 | panic("general protection fault\n"); |
129 | } |
129 | } |
130 | 130 | ||
131 | static void ss_fault(int n, istate_t *istate) |
131 | static void ss_fault(int n, istate_t *istate) |
132 | { |
132 | { |
133 | fault_if_from_uspace(istate, "stack fault"); |
133 | fault_if_from_uspace(istate, "stack fault"); |
134 | 134 | ||
135 | decode_istate(istate); |
135 | decode_istate(istate); |
136 | panic("stack fault\n"); |
136 | panic("stack fault\n"); |
137 | } |
137 | } |
138 | 138 | ||
139 | static void simd_fp_exception(int n, istate_t *istate) |
139 | static void simd_fp_exception(int n, istate_t *istate) |
140 | { |
140 | { |
141 | uint32_t mxcsr; |
141 | uint32_t mxcsr; |
142 | asm |
142 | asm |
143 | ( |
143 | ( |
144 | "stmxcsr %0;\n" |
144 | "stmxcsr %0;\n" |
145 | :"=m"(mxcsr) |
145 | :"=m"(mxcsr) |
146 | ); |
146 | ); |
147 | fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR: %#zx", |
147 | fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR: %#zx", |
148 | (unative_t)mxcsr); |
148 | (unative_t)mxcsr); |
149 | 149 | ||
150 | decode_istate(istate); |
150 | decode_istate(istate); |
151 | printf("MXCSR: %#zx\n",(unative_t)(mxcsr)); |
151 | printf("MXCSR: %#zx\n",(unative_t)(mxcsr)); |
152 | panic("SIMD FP exception(19)\n"); |
152 | panic("SIMD FP exception(19)\n"); |
153 | } |
153 | } |
154 | 154 | ||
155 | static void nm_fault(int n, istate_t *istate) |
155 | static void nm_fault(int n, istate_t *istate) |
156 | { |
156 | { |
157 | #ifdef CONFIG_FPU_LAZY |
157 | #ifdef CONFIG_FPU_LAZY |
158 | scheduler_fpu_lazy_request(); |
158 | scheduler_fpu_lazy_request(); |
159 | #else |
159 | #else |
160 | fault_if_from_uspace(istate, "fpu fault"); |
160 | fault_if_from_uspace(istate, "fpu fault"); |
161 | panic("fpu fault"); |
161 | panic("fpu fault"); |
162 | #endif |
162 | #endif |
163 | } |
163 | } |
164 | 164 | ||
165 | #ifdef CONFIG_SMP |
165 | #ifdef CONFIG_SMP |
166 | static void tlb_shootdown_ipi(int n, istate_t *istate) |
166 | static void tlb_shootdown_ipi(int n, istate_t *istate) |
167 | { |
167 | { |
168 | trap_virtual_eoi(); |
168 | trap_virtual_eoi(); |
169 | tlb_shootdown_ipi_recv(); |
169 | tlb_shootdown_ipi_recv(); |
170 | } |
170 | } |
171 | #endif |
171 | #endif |
172 | 172 | ||
173 | /** Handler of IRQ exceptions */ |
173 | /** Handler of IRQ exceptions */ |
174 | static void irq_interrupt(int n, istate_t *istate) |
174 | static void irq_interrupt(int n, istate_t *istate) |
175 | { |
175 | { |
176 | ASSERT(n >= IVT_IRQBASE); |
176 | ASSERT(n >= IVT_IRQBASE); |
177 | 177 | ||
178 | int inum = n - IVT_IRQBASE; |
178 | int inum = n - IVT_IRQBASE; |
179 | ASSERT(inum < IRQ_COUNT); |
179 | bool ack = false; |
180 | ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1)); |
180 | ASSERT(inum < IRQ_COUNT); |
181 | 181 | ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1)); |
|
182 | irq_t *irq = irq_dispatch_and_lock(inum); |
182 | |
183 | if (irq) { |
183 | irq_t *irq = irq_dispatch_and_lock(inum); |
184 | /* |
184 | if (irq) { |
185 | * The IRQ handler was found. |
185 | /* |
186 | */ |
186 | * The IRQ handler was found. |
187 | irq->handler(irq, irq->arg); |
187 | */ |
188 | spinlock_unlock(&irq->lock); |
188 | |
189 | } else { |
189 | if (irq->preack) { |
190 | /* |
190 | /* Send EOI before processing the interrupt */ |
191 | * Spurious interrupt. |
191 | trap_virtual_eoi(); |
192 | */ |
192 | ack = true; |
193 | #ifdef CONFIG_DEBUG |
193 | } |
194 | printf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, inum); |
194 | irq->handler(irq, irq->arg); |
195 | #endif |
195 | spinlock_unlock(&irq->lock); |
196 | } |
196 | } else { |
197 | trap_virtual_eoi(); |
197 | /* |
198 | } |
198 | * Spurious interrupt. |
199 | 199 | */ |
|
200 | void interrupt_init(void) |
200 | #ifdef CONFIG_DEBUG |
201 | { |
201 | printf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, inum); |
202 | int i; |
202 | #endif |
203 | 203 | } |
|
204 | for (i = 0; i < IVT_ITEMS; i++) |
204 | |
205 | exc_register(i, "null", (iroutine) null_interrupt); |
205 | if (!ack) |
206 | 206 | trap_virtual_eoi(); |
|
207 | for (i = 0; i < IRQ_COUNT; i++) { |
207 | } |
208 | if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1)) |
208 | |
209 | exc_register(IVT_IRQBASE + i, "irq", (iroutine) irq_interrupt); |
209 | void interrupt_init(void) |
210 | } |
210 | { |
211 | 211 | int i; |
|
212 | exc_register(7, "nm_fault", (iroutine) nm_fault); |
212 | |
213 | exc_register(12, "ss_fault", (iroutine) ss_fault); |
213 | for (i = 0; i < IVT_ITEMS; i++) |
214 | exc_register(13, "gp_fault", (iroutine) gp_fault); |
214 | exc_register(i, "null", (iroutine) null_interrupt); |
215 | exc_register(19, "simd_fp", (iroutine) simd_fp_exception); |
215 | |
216 | 216 | for (i = 0; i < IRQ_COUNT; i++) { |
|
217 | #ifdef CONFIG_SMP |
217 | if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1)) |
218 | exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", (iroutine) tlb_shootdown_ipi); |
218 | exc_register(IVT_IRQBASE + i, "irq", (iroutine) irq_interrupt); |
219 | #endif |
219 | } |
220 | } |
220 | |
221 | 221 | exc_register(7, "nm_fault", (iroutine) nm_fault); |
|
222 | void trap_virtual_enable_irqs(uint16_t irqmask) |
222 | exc_register(12, "ss_fault", (iroutine) ss_fault); |
223 | { |
223 | exc_register(13, "gp_fault", (iroutine) gp_fault); |
224 | if (enable_irqs_function) |
224 | exc_register(19, "simd_fp", (iroutine) simd_fp_exception); |
225 | enable_irqs_function(irqmask); |
225 | |
226 | else |
226 | #ifdef CONFIG_SMP |
227 | panic("no enable_irqs_function\n"); |
227 | exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", (iroutine) tlb_shootdown_ipi); |
228 | } |
228 | #endif |
229 | 229 | } |
|
230 | void trap_virtual_disable_irqs(uint16_t irqmask) |
230 | |
231 | { |
231 | void trap_virtual_enable_irqs(uint16_t irqmask) |
232 | if (disable_irqs_function) |
232 | { |
233 | disable_irqs_function(irqmask); |
233 | if (enable_irqs_function) |
234 | else |
234 | enable_irqs_function(irqmask); |
235 | panic("no disable_irqs_function\n"); |
235 | else |
236 | } |
236 | panic("no enable_irqs_function\n"); |
237 | 237 | } |
|
238 | /** @} |
238 | |
239 | */ |
239 | void trap_virtual_disable_irqs(uint16_t irqmask) |
- | 240 | { |
|
- | 241 | if (disable_irqs_function) |
|
- | 242 | disable_irqs_function(irqmask); |
|
- | 243 | else |
|
- | 244 | panic("no disable_irqs_function\n"); |
|
- | 245 | } |
|
- | 246 | ||
- | 247 | /** @} |
|
- | 248 | */ |
|
- | 249 |