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| 1 | /* |
1 | /* |
| 2 | * Copyright (c) 2001-2004 Jakub Jermar |
2 | * Copyright (c) 2001-2004 Jakub Jermar |
| 3 | * All rights reserved. |
3 | * All rights reserved. |
| 4 | * |
4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
7 | * are met: |
| 8 | * |
8 | * |
| 9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
| 14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
| 15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
| 16 | * |
16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
27 | */ |
| 28 | 28 | ||
| 29 | /** @addtogroup ia32 |
29 | /** @addtogroup ia32 |
| 30 | * @{ |
30 | * @{ |
| 31 | */ |
31 | */ |
| 32 | /** |
32 | /** |
| 33 | * @file |
33 | * @file |
| 34 | * @brief i8254 chip driver. |
34 | * @brief i8254 chip driver. |
| 35 | * |
35 | * |
| 36 | * Low level time functions. |
36 | * Low level time functions. |
| 37 | */ |
37 | */ |
| 38 | 38 | ||
| 39 | #include <arch/types.h> |
39 | #include <arch/types.h> |
| 40 | #include <time/clock.h> |
40 | #include <time/clock.h> |
| 41 | #include <time/delay.h> |
41 | #include <time/delay.h> |
| 42 | #include <arch/cycle.h> |
42 | #include <arch/cycle.h> |
| 43 | #include <arch/interrupt.h> |
43 | #include <arch/interrupt.h> |
| 44 | #include <arch/drivers/i8259.h> |
44 | #include <arch/drivers/i8259.h> |
| 45 | #include <arch/drivers/i8254.h> |
45 | #include <arch/drivers/i8254.h> |
| 46 | #include <cpu.h> |
46 | #include <cpu.h> |
| 47 | #include <config.h> |
47 | #include <config.h> |
| 48 | #include <arch/pm.h> |
48 | #include <arch/pm.h> |
| 49 | #include <arch/asm.h> |
49 | #include <arch/asm.h> |
| 50 | #include <arch/cpuid.h> |
50 | #include <arch/cpuid.h> |
| 51 | #include <arch.h> |
51 | #include <arch.h> |
| 52 | #include <time/delay.h> |
52 | #include <time/delay.h> |
| 53 | #include <ddi/irq.h> |
53 | #include <ddi/irq.h> |
| 54 | #include <ddi/device.h> |
54 | #include <ddi/device.h> |
| 55 | 55 | ||
| 56 | #define CLK_PORT1 0x40 |
56 | #define CLK_PORT1 0x40 |
| 57 | #define CLK_PORT4 0x43 |
57 | #define CLK_PORT4 0x43 |
| 58 | 58 | ||
| 59 | #define CLK_CONST 1193180 |
59 | #define CLK_CONST 1193180 |
| 60 | #define MAGIC_NUMBER 1194 |
60 | #define MAGIC_NUMBER 1194 |
| 61 | 61 | ||
| 62 | static irq_t i8254_irq; |
62 | static irq_t i8254_irq; |
| 63 | 63 | ||
| 64 | static irq_ownership_t i8254_claim(void) |
64 | static irq_ownership_t i8254_claim(void) |
| 65 | { |
65 | { |
| 66 | return IRQ_ACCEPT; |
66 | return IRQ_ACCEPT; |
| 67 | } |
67 | } |
| 68 | 68 | ||
| 69 | static void i8254_irq_handler(irq_t *irq, void *arg, ...) |
69 | static void i8254_irq_handler(irq_t *irq, void *arg, ...) |
| 70 | { |
70 | { |
| 71 | /* |
71 | /* |
| 72 | * This IRQ is responsible for kernel preemption. |
72 | * This IRQ is responsible for kernel preemption. |
| 73 | * Nevertheless, we are now holding a spinlock which prevents |
73 | * Nevertheless, we are now holding a spinlock which prevents |
| 74 | * preemption. For this particular IRQ, we don't need the |
74 | * preemption. For this particular IRQ, we don't need the |
| 75 | * lock. We just release it, call clock() and then reacquire it again. |
75 | * lock. We just release it, call clock() and then reacquire it again. |
| 76 | */ |
76 | */ |
| 77 | spinlock_unlock(&irq->lock); |
77 | spinlock_unlock(&irq->lock); |
| 78 | clock(); |
78 | clock(); |
| 79 | spinlock_lock(&irq->lock); |
79 | spinlock_lock(&irq->lock); |
| 80 | } |
80 | } |
| 81 | 81 | ||
| 82 | void i8254_init(void) |
82 | void i8254_init(void) |
| 83 | { |
83 | { |
| 84 | irq_initialize(&i8254_irq); |
84 | irq_initialize(&i8254_irq); |
| 85 | i8254_irq.preack = true; |
85 | i8254_irq.devno = device_assign_devno(); |
| 86 | i8254_irq.devno = device_assign_devno(); |
86 | i8254_irq.inr = IRQ_CLK; |
| 87 | i8254_irq.inr = IRQ_CLK; |
87 | i8254_irq.claim = i8254_claim; |
| 88 | i8254_irq.claim = i8254_claim; |
88 | i8254_irq.handler = i8254_irq_handler; |
| 89 | i8254_irq.handler = i8254_irq_handler; |
89 | irq_register(&i8254_irq); |
| 90 | irq_register(&i8254_irq); |
90 | |
| 91 | 91 | i8254_normal_operation(); |
|
| 92 | i8254_normal_operation(); |
92 | } |
| 93 | } |
93 | |
| 94 | 94 | void i8254_normal_operation(void) |
|
| 95 | void i8254_normal_operation(void) |
95 | { |
| 96 | { |
96 | outb(CLK_PORT4, 0x36); |
| 97 | outb(CLK_PORT4, 0x36); |
97 | pic_disable_irqs(1 << IRQ_CLK); |
| 98 | pic_disable_irqs(1 << IRQ_CLK); |
98 | outb(CLK_PORT1, (CLK_CONST / HZ) & 0xf); |
| 99 | outb(CLK_PORT1, (CLK_CONST / HZ) & 0xf); |
99 | outb(CLK_PORT1, (CLK_CONST / HZ) >> 8); |
| 100 | outb(CLK_PORT1, (CLK_CONST / HZ) >> 8); |
100 | pic_enable_irqs(1 << IRQ_CLK); |
| 101 | pic_enable_irqs(1 << IRQ_CLK); |
101 | } |
| 102 | } |
102 | |
| 103 | 103 | #define LOOPS 150000 |
|
| 104 | #define LOOPS 150000 |
104 | #define SHIFT 11 |
| 105 | #define SHIFT 11 |
105 | void i8254_calibrate_delay_loop(void) |
| 106 | void i8254_calibrate_delay_loop(void) |
106 | { |
| 107 | { |
107 | uint64_t clk1, clk2; |
| 108 | uint64_t clk1, clk2; |
108 | uint32_t t1, t2, o1, o2; |
| 109 | uint32_t t1, t2, o1, o2; |
109 | uint8_t not_ok; |
| 110 | uint8_t not_ok; |
110 | |
| 111 | 111 | ||
| 112 | 112 | /* |
|
| 113 | /* |
113 | * One-shot timer. Count-down from 0xffff at 1193180Hz |
| 114 | * One-shot timer. Count-down from 0xffff at 1193180Hz |
114 | * MAGIC_NUMBER is the magic value for 1ms. |
| 115 | * MAGIC_NUMBER is the magic value for 1ms. |
115 | */ |
| 116 | */ |
116 | outb(CLK_PORT4, 0x30); |
| 117 | outb(CLK_PORT4, 0x30); |
117 | outb(CLK_PORT1, 0xff); |
| 118 | outb(CLK_PORT1, 0xff); |
118 | outb(CLK_PORT1, 0xff); |
| 119 | outb(CLK_PORT1, 0xff); |
119 | |
| 120 | 120 | do { |
|
| 121 | do { |
121 | /* will read both status and count */ |
| 122 | /* will read both status and count */ |
122 | outb(CLK_PORT4, 0xc2); |
| 123 | outb(CLK_PORT4, 0xc2); |
123 | not_ok = (inb(CLK_PORT1)>>6)&1; |
| 124 | not_ok = (inb(CLK_PORT1)>>6)&1; |
124 | t1 = inb(CLK_PORT1); |
| 125 | t1 = inb(CLK_PORT1); |
125 | t1 |= inb(CLK_PORT1) << 8; |
| 126 | t1 |= inb(CLK_PORT1) << 8; |
126 | } while (not_ok); |
| 127 | } while (not_ok); |
127 | |
| 128 | 128 | asm_delay_loop(LOOPS); |
|
| 129 | asm_delay_loop(LOOPS); |
129 | |
| 130 | 130 | outb(CLK_PORT4, 0xd2); |
|
| 131 | outb(CLK_PORT4, 0xd2); |
131 | t2 = inb(CLK_PORT1); |
| 132 | t2 = inb(CLK_PORT1); |
132 | t2 |= inb(CLK_PORT1) << 8; |
| 133 | t2 |= inb(CLK_PORT1) << 8; |
133 | |
| 134 | 134 | /* |
|
| 135 | /* |
135 | * We want to determine the overhead of the calibrating mechanism. |
| 136 | * We want to determine the overhead of the calibrating mechanism. |
136 | */ |
| 137 | */ |
137 | outb(CLK_PORT4, 0xd2); |
| 138 | outb(CLK_PORT4, 0xd2); |
138 | o1 = inb(CLK_PORT1); |
| 139 | o1 = inb(CLK_PORT1); |
139 | o1 |= inb(CLK_PORT1) << 8; |
| 140 | o1 |= inb(CLK_PORT1) << 8; |
140 | |
| 141 | 141 | asm_fake_loop(LOOPS); |
|
| 142 | asm_fake_loop(LOOPS); |
142 | |
| 143 | 143 | outb(CLK_PORT4, 0xd2); |
|
| 144 | outb(CLK_PORT4, 0xd2); |
144 | o2 = inb(CLK_PORT1); |
| 145 | o2 = inb(CLK_PORT1); |
145 | o2 |= inb(CLK_PORT1) << 8; |
| 146 | o2 |= inb(CLK_PORT1) << 8; |
146 | |
| 147 | 147 | CPU->delay_loop_const = |
|
| 148 | CPU->delay_loop_const = |
148 | ((MAGIC_NUMBER * LOOPS) / 1000) / ((t1 - t2) - (o1 - o2)) + |
| 149 | ((MAGIC_NUMBER * LOOPS) / 1000) / ((t1 - t2) - (o1 - o2)) + |
149 | (((MAGIC_NUMBER * LOOPS) / 1000) % ((t1 - t2) - (o1 - o2)) ? 1 : 0); |
| 150 | (((MAGIC_NUMBER * LOOPS) / 1000) % ((t1 - t2) - (o1 - o2)) ? 1 : 0); |
150 | |
| 151 | 151 | clk1 = get_cycle(); |
|
| 152 | clk1 = get_cycle(); |
152 | delay(1 << SHIFT); |
| 153 | delay(1 << SHIFT); |
153 | clk2 = get_cycle(); |
| 154 | clk2 = get_cycle(); |
154 | |
| 155 | 155 | CPU->frequency_mhz = (clk2 - clk1) >> SHIFT; |
|
| 156 | CPU->frequency_mhz = (clk2 - clk1) >> SHIFT; |
156 | |
| 157 | 157 | return; |
|
| 158 | return; |
158 | } |
| 159 | } |
159 | |
| 160 | 160 | /** @} |
|
| 161 | /** @} |
161 | */ |
| 162 | */ |
- | |