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| Rev 4339 | Rev 4341 | ||
|---|---|---|---|
| Line 24... | Line 24... | ||
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
27 | */ |
| 28 | 28 | ||
| 29 | /** @addtogroup ppc32mm |
29 | /** @addtogroup ppc32mm |
| 30 | * @{ |
30 | * @{ |
| 31 | */ |
31 | */ |
| 32 | /** @file |
32 | /** @file |
| 33 | */ |
33 | */ |
| 34 | 34 | ||
| Line 38... | Line 38... | ||
| 38 | #include <interrupt.h> |
38 | #include <interrupt.h> |
| 39 | #include <mm/as.h> |
39 | #include <mm/as.h> |
| 40 | #include <arch.h> |
40 | #include <arch.h> |
| 41 | #include <print.h> |
41 | #include <print.h> |
| 42 | #include <symtab.h> |
42 | #include <symtab.h> |
| - | 43 | #include <macros.h> |
|
| - | 44 | ||
| - | 45 | ||
| - | 46 | static unsigned int seed = 10; |
|
| - | 47 | static unsigned int seed_real __attribute__ ((section("K_UNMAPPED_DATA_START"))) = 42; |
|
| - | 48 | ||
| - | 49 | ||
| - | 50 | #define TLB_FLUSH \ |
|
| - | 51 | "tlbie %0\n" \ |
|
| - | 52 | "addi %0, %0, 0x1000\n" |
|
| 43 | 53 | ||
| 44 | 54 | ||
| 45 | /** Try to find PTE for faulting address |
55 | /** Try to find PTE for faulting address |
| 46 | * |
56 | * |
| 47 | * Try to find PTE for faulting address. |
57 | * Try to find PTE for faulting address. |
| Line 64... | Line 74... | ||
| 64 | { |
74 | { |
| 65 | /* |
75 | /* |
| 66 | * Check if the mapping exists in page tables. |
76 | * Check if the mapping exists in page tables. |
| 67 | */ |
77 | */ |
| 68 | pte_t *pte = page_mapping_find(as, badvaddr); |
78 | pte_t *pte = page_mapping_find(as, badvaddr); |
| 69 | if ((pte) && (pte->p)) { |
79 | if ((pte) && (pte->present)) { |
| 70 | /* |
80 | /* |
| 71 | * Mapping found in page tables. |
81 | * Mapping found in page tables. |
| 72 | * Immediately succeed. |
82 | * Immediately succeed. |
| 73 | */ |
83 | */ |
| 74 | return pte; |
84 | return pte; |
| Line 86... | Line 96... | ||
| 86 | * The higher-level page fault handler succeeded, |
96 | * The higher-level page fault handler succeeded, |
| 87 | * The mapping ought to be in place. |
97 | * The mapping ought to be in place. |
| 88 | */ |
98 | */ |
| 89 | page_table_lock(as, lock); |
99 | page_table_lock(as, lock); |
| 90 | pte = page_mapping_find(as, badvaddr); |
100 | pte = page_mapping_find(as, badvaddr); |
| 91 | ASSERT((pte) && (pte->p)); |
101 | ASSERT((pte) && (pte->present)); |
| 92 | *pfrc = 0; |
102 | *pfrc = 0; |
| 93 | return pte; |
103 | return pte; |
| 94 | case AS_PF_DEFER: |
104 | case AS_PF_DEFER: |
| 95 | page_table_lock(as, lock); |
105 | page_table_lock(as, lock); |
| 96 | *pfrc = rc; |
106 | *pfrc = rc; |
| Line 109... | Line 119... | ||
| 109 | static void pht_refill_fail(uintptr_t badvaddr, istate_t *istate) |
119 | static void pht_refill_fail(uintptr_t badvaddr, istate_t *istate) |
| 110 | { |
120 | { |
| 111 | char *symbol = ""; |
121 | char *symbol = ""; |
| 112 | char *sym2 = ""; |
122 | char *sym2 = ""; |
| 113 | 123 | ||
| 114 | char *s = get_symtab_entry(istate->pc); |
124 | char *str = get_symtab_entry(istate->pc); |
| 115 | if (s) |
125 | if (str) |
| 116 | symbol = s; |
126 | symbol = str; |
| 117 | s = get_symtab_entry(istate->lr); |
127 | str = get_symtab_entry(istate->lr); |
| 118 | if (s) |
128 | if (str) |
| 119 | sym2 = s; |
129 | sym2 = str; |
| 120 | 130 | ||
| 121 | fault_if_from_uspace(istate, |
131 | fault_if_from_uspace(istate, |
| 122 | "%p: PHT Refill Exception at %p (%s<-%s).", badvaddr, |
132 | "PHT Refill Exception on %p.", badvaddr); |
| 123 | istate->pc, symbol, sym2); |
- | |
| 124 | panic("%p: PHT Refill Exception at %p (%s<-%s).", badvaddr, |
133 | panic("%p: PHT Refill Exception at %p (%s<-%s).", badvaddr, |
| 125 | istate->pc, symbol, sym2); |
134 | istate->pc, symbol, sym2); |
| 126 | } |
135 | } |
| 127 | 136 | ||
| 128 | 137 | ||
| 129 | static void pht_insert(const uintptr_t vaddr, const pfn_t pfn) |
138 | static void pht_insert(const uintptr_t vaddr, const pte_t *pte) |
| 130 | { |
139 | { |
| 131 | uint32_t page = (vaddr >> 12) & 0xffff; |
140 | uint32_t page = (vaddr >> 12) & 0xffff; |
| 132 | uint32_t api = (vaddr >> 22) & 0x3f; |
141 | uint32_t api = (vaddr >> 22) & 0x3f; |
| 133 | 142 | ||
| 134 | uint32_t vsid; |
143 | uint32_t vsid; |
| Line 150... | Line 159... | ||
| 150 | uint32_t hash = vsid ^ page; |
159 | uint32_t hash = vsid ^ page; |
| 151 | uint32_t base = (hash & 0x3ff) << 3; |
160 | uint32_t base = (hash & 0x3ff) << 3; |
| 152 | uint32_t i; |
161 | uint32_t i; |
| 153 | bool found = false; |
162 | bool found = false; |
| 154 | 163 | ||
| 155 | /* Find unused or colliding |
- | |
| 156 | PTE in PTEG */ |
164 | /* Find colliding PTE in PTEG */ |
| 157 | for (i = 0; i < 8; i++) { |
165 | for (i = 0; i < 8; i++) { |
| - | 166 | if ((phte[base + i].v) |
|
| 158 | if ((!phte[base + i].v) || ((phte[base + i].vsid == vsid) && |
167 | && (phte[base + i].vsid == vsid) |
| 159 | (phte[base + i].api == api))) { |
168 | && (phte[base + i].api == api) |
| - | 169 | && (phte[base + i].h == 0)) { |
|
| 160 | found = true; |
170 | found = true; |
| 161 | break; |
171 | break; |
| 162 | } |
172 | } |
| 163 | } |
173 | } |
| 164 | 174 | ||
| 165 | if (!found) { |
175 | if (!found) { |
| 166 | /* Secondary hash (not) */ |
- | |
| 167 | uint32_t base2 = (~hash & 0x3ff) << 3; |
- | |
| 168 | - | ||
| 169 | /* Find unused or colliding |
176 | /* Find unused PTE in PTEG */ |
| 170 | PTE in PTEG */ |
- | |
| 171 | for (i = 0; i < 8; i++) { |
177 | for (i = 0; i < 8; i++) { |
| 172 | if ((!phte[base2 + i].v) || |
178 | if (!phte[base + i].v) { |
| 173 | ((phte[base2 + i].vsid == vsid) && |
- | |
| 174 | (phte[base2 + i].api == api))) { |
- | |
| 175 | found = true; |
179 | found = true; |
| 176 | base = base2; |
- | |
| 177 | h = 1; |
- | |
| 178 | break; |
180 | break; |
| 179 | } |
181 | } |
| 180 | } |
182 | } |
| 181 | - | ||
| 182 | if (!found) { |
- | |
| 183 | // TODO: A/C precedence groups |
- | |
| 184 | i = page % 8; |
- | |
| 185 | } |
- | |
| 186 | } |
- | |
| 187 | - | ||
| 188 | phte[base + i].v = 1; |
- | |
| 189 | phte[base + i].vsid = vsid; |
- | |
| 190 | phte[base + i].h = h; |
- | |
| 191 | phte[base + i].api = api; |
- | |
| 192 | phte[base + i].rpn = pfn; |
- | |
| 193 | phte[base + i].r = 0; |
- | |
| 194 | phte[base + i].c = 0; |
- | |
| 195 | phte[base + i].pp = 2; // FIXME |
- | |
| 196 | } |
- | |
| 197 | - | ||
| 198 | - | ||
| 199 | static void pht_real_insert(const uintptr_t vaddr, const pfn_t pfn) |
- | |
| 200 | { |
- | |
| 201 | uint32_t page = (vaddr >> 12) & 0xffff; |
- | |
| 202 | uint32_t api = (vaddr >> 22) & 0x3f; |
- | |
| 203 | - | ||
| 204 | uint32_t vsid; |
- | |
| 205 | asm volatile ( |
- | |
| 206 | "mfsrin %0, %1\n" |
- | |
| 207 | : "=r" (vsid) |
- | |
| 208 | : "r" (vaddr) |
- | |
| 209 | ); |
- | |
| 210 | - | ||
| 211 | uint32_t sdr1; |
- | |
| 212 | asm volatile ( |
- | |
| 213 | "mfsdr1 %0\n" |
- | |
| 214 | : "=r" (sdr1) |
- | |
| 215 | ); |
- | |
| 216 | phte_t *phte_physical = (phte_t *) (sdr1 & 0xffff0000); |
- | |
| 217 | - | ||
| 218 | /* Primary hash (xor) */ |
- | |
| 219 | uint32_t h = 0; |
- | |
| 220 | uint32_t hash = vsid ^ page; |
- | |
| 221 | uint32_t base = (hash & 0x3ff) << 3; |
- | |
| 222 | uint32_t i; |
- | |
| 223 | bool found = false; |
- | |
| 224 | - | ||
| 225 | /* Find unused or colliding |
- | |
| 226 | PTE in PTEG */ |
- | |
| 227 | for (i = 0; i < 8; i++) { |
- | |
| 228 | if ((!phte_physical[base + i].v) || |
- | |
| 229 | ((phte_physical[base + i].vsid == vsid) && |
- | |
| 230 | (phte_physical[base + i].api == api))) { |
- | |
| 231 | found = true; |
- | |
| 232 | break; |
- | |
| 233 | } |
- | |
| 234 | } |
183 | } |
| 235 | 184 | ||
| 236 | if (!found) { |
185 | if (!found) { |
| 237 | /* Secondary hash (not) */ |
186 | /* Secondary hash (not) */ |
| 238 | uint32_t base2 = (~hash & 0x3ff) << 3; |
187 | uint32_t base2 = (~hash & 0x3ff) << 3; |
| 239 | 188 | ||
| 240 | /* Find unused or colliding |
- | |
| 241 | PTE in PTEG */ |
189 | /* Find colliding PTE in PTEG */ |
| 242 | for (i = 0; i < 8; i++) { |
190 | for (i = 0; i < 8; i++) { |
| 243 | if ((!phte_physical[base2 + i].v) || |
191 | if ((phte[base2 + i].v) |
| 244 | ((phte_physical[base2 + i].vsid == vsid) && |
192 | && (phte[base2 + i].vsid == vsid) |
| 245 | (phte_physical[base2 + i].api == api))) { |
193 | && (phte[base2 + i].api == api) |
| - | 194 | && (phte[base2 + i].h == 1)) { |
|
| 246 | found = true; |
195 | found = true; |
| 247 | base = base2; |
196 | base = base2; |
| 248 | h = 1; |
197 | h = 1; |
| 249 | break; |
198 | break; |
| 250 | } |
199 | } |
| 251 | } |
200 | } |
| 252 | 201 | ||
| 253 | if (!found) { |
202 | if (!found) { |
| 254 | // TODO: A/C precedence groups |
203 | /* Find unused PTE in PTEG */ |
| - | 204 | for (i = 0; i < 8; i++) { |
|
| - | 205 | if (!phte[base2 + i].v) { |
|
| - | 206 | found = true; |
|
| 255 | i = page % 8; |
207 | base = base2; |
| - | 208 | h = 1; |
|
| - | 209 | break; |
|
| - | 210 | } |
|
| - | 211 | } |
|
| 256 | } |
212 | } |
| - | 213 | ||
| - | 214 | if (!found) |
|
| - | 215 | i = RANDI(seed) % 8; |
|
| 257 | } |
216 | } |
| 258 | 217 | ||
| 259 | phte_physical[base + i].v = 1; |
218 | phte[base + i].v = 1; |
| 260 | phte_physical[base + i].vsid = vsid; |
219 | phte[base + i].vsid = vsid; |
| 261 | phte_physical[base + i].h = h; |
220 | phte[base + i].h = h; |
| 262 | phte_physical[base + i].api = api; |
221 | phte[base + i].api = api; |
| 263 | phte_physical[base + i].rpn = pfn; |
222 | phte[base + i].rpn = pte->pfn; |
| 264 | phte_physical[base + i].r = 0; |
223 | phte[base + i].r = 0; |
| 265 | phte_physical[base + i].c = 0; |
224 | phte[base + i].c = 0; |
| - | 225 | phte[base + i].wimg = (pte->page_cache_disable ? WIMG_NO_CACHE : 0); |
|
| 266 | phte_physical[base + i].pp = 2; // FIXME |
226 | phte[base + i].pp = 2; // FIXME |
| 267 | } |
227 | } |
| 268 | 228 | ||
| 269 | 229 | ||
| 270 | /** Process Instruction/Data Storage Interrupt |
230 | /** Process Instruction/Data Storage Exception |
| 271 | * |
231 | * |
| 272 | * @param n Interrupt vector number. |
232 | * @param n Exception vector number. |
| 273 | * @param istate Interrupted register context. |
233 | * @param istate Interrupted register context. |
| 274 | * |
234 | * |
| 275 | */ |
235 | */ |
| 276 | void pht_refill(int n, istate_t *istate) |
236 | void pht_refill(int n, istate_t *istate) |
| 277 | { |
237 | { |
| 278 | uintptr_t badvaddr; |
238 | uintptr_t badvaddr; |
| Line 287... | Line 247... | ||
| 287 | } else { |
247 | } else { |
| 288 | as = AS; |
248 | as = AS; |
| 289 | lock = true; |
249 | lock = true; |
| 290 | } |
250 | } |
| 291 | 251 | ||
| 292 | if (n == VECTOR_DATA_STORAGE) { |
252 | if (n == VECTOR_DATA_STORAGE) |
| 293 | asm volatile ( |
- | |
| 294 | "mfdar %0\n" |
- | |
| 295 | : "=r" (badvaddr) |
253 | badvaddr = istate->dar; |
| 296 | ); |
- | |
| 297 | } else |
254 | else |
| 298 | badvaddr = istate->pc; |
255 | badvaddr = istate->pc; |
| 299 | 256 | ||
| 300 | page_table_lock(as, lock); |
257 | page_table_lock(as, lock); |
| 301 | 258 | ||
| 302 | pte = find_mapping_and_check(as, lock, badvaddr, |
259 | pte = find_mapping_and_check(as, lock, badvaddr, |
| Line 316... | Line 273... | ||
| 316 | default: |
273 | default: |
| 317 | panic("Unexpected pfrc (%d).", pfrc); |
274 | panic("Unexpected pfrc (%d).", pfrc); |
| 318 | } |
275 | } |
| 319 | } |
276 | } |
| 320 | 277 | ||
| 321 | pte->a = 1; /* Record access to PTE */ |
278 | pte->accessed = 1; /* Record access to PTE */ |
| 322 | pht_insert(badvaddr, pte->pfn); |
279 | pht_insert(badvaddr, pte); |
| 323 | 280 | ||
| 324 | page_table_unlock(as, lock); |
281 | page_table_unlock(as, lock); |
| 325 | return; |
282 | return; |
| 326 | 283 | ||
| 327 | fail: |
284 | fail: |
| 328 | page_table_unlock(as, lock); |
285 | page_table_unlock(as, lock); |
| 329 | pht_refill_fail(badvaddr, istate); |
286 | pht_refill_fail(badvaddr, istate); |
| 330 | } |
287 | } |
| 331 | 288 | ||
| 332 | 289 | ||
| 333 | /** Process Instruction/Data Storage Interrupt in Real Mode |
290 | /** Process Instruction/Data Storage Exception in Real Mode |
| 334 | * |
291 | * |
| 335 | * @param n Interrupt vector number. |
292 | * @param n Exception vector number. |
| 336 | * @param istate Interrupted register context. |
293 | * @param istate Interrupted register context. |
| 337 | * |
294 | * |
| 338 | */ |
295 | */ |
| 339 | bool pht_real_refill(int n, istate_t *istate) |
296 | bool pht_refill_real(int n, istate_t *istate) |
| 340 | { |
297 | { |
| 341 | uintptr_t badvaddr; |
298 | uintptr_t badvaddr; |
| 342 | 299 | ||
| 343 | if (n == VECTOR_DATA_STORAGE) { |
300 | if (n == VECTOR_DATA_STORAGE) |
| 344 | asm volatile ( |
- | |
| 345 | "mfdar %0\n" |
- | |
| 346 | : "=r" (badvaddr) |
301 | badvaddr = istate->dar; |
| 347 | ); |
- | |
| 348 | } else |
302 | else |
| 349 | badvaddr = istate->pc; |
303 | badvaddr = istate->pc; |
| 350 | 304 | ||
| 351 | uint32_t physmem; |
305 | uint32_t physmem; |
| 352 | asm volatile ( |
306 | asm volatile ( |
| 353 | "mfsprg3 %0\n" |
307 | "mfsprg3 %0\n" |
| 354 | : "=r" (physmem) |
308 | : "=r" (physmem) |
| 355 | ); |
309 | ); |
| 356 | 310 | ||
| 357 | if ((badvaddr >= PA2KA(0)) && (badvaddr < PA2KA(physmem))) { |
311 | if ((badvaddr < PA2KA(0)) || (badvaddr >= PA2KA(physmem))) |
| - | 312 | return false; |
|
| - | 313 | ||
| - | 314 | uint32_t page = (badvaddr >> 12) & 0xffff; |
|
| 358 | pht_real_insert(badvaddr, KA2PA(badvaddr) >> 12); |
315 | uint32_t api = (badvaddr >> 22) & 0x3f; |
| - | 316 | ||
| - | 317 | uint32_t vsid; |
|
| - | 318 | asm volatile ( |
|
| - | 319 | "mfsrin %0, %1\n" |
|
| - | 320 | : "=r" (vsid) |
|
| - | 321 | : "r" (badvaddr) |
|
| - | 322 | ); |
|
| - | 323 | ||
| - | 324 | uint32_t sdr1; |
|
| - | 325 | asm volatile ( |
|
| - | 326 | "mfsdr1 %0\n" |
|
| - | 327 | : "=r" (sdr1) |
|
| - | 328 | ); |
|
| - | 329 | phte_t *phte_real = (phte_t *) (sdr1 & 0xffff0000); |
|
| - | 330 | ||
| - | 331 | /* Primary hash (xor) */ |
|
| - | 332 | uint32_t h = 0; |
|
| - | 333 | uint32_t hash = vsid ^ page; |
|
| - | 334 | uint32_t base = (hash & 0x3ff) << 3; |
|
| - | 335 | uint32_t i; |
|
| - | 336 | bool found = false; |
|
| - | 337 | ||
| - | 338 | /* Find colliding PTE in PTEG */ |
|
| - | 339 | for (i = 0; i < 8; i++) { |
|
| - | 340 | if ((phte_real[base + i].v) |
|
| - | 341 | && (phte_real[base + i].vsid == vsid) |
|
| - | 342 | && (phte_real[base + i].api == api) |
|
| - | 343 | && (phte_real[base + i].h == 0)) { |
|
| 359 | return true; |
344 | found = true; |
| - | 345 | break; |
|
| - | 346 | } |
|
| 360 | } |
347 | } |
| 361 | 348 | ||
| - | 349 | if (!found) { |
|
| - | 350 | /* Find unused PTE in PTEG */ |
|
| - | 351 | for (i = 0; i < 8; i++) { |
|
| - | 352 | if (!phte_real[base + i].v) { |
|
| - | 353 | found = true; |
|
| - | 354 | break; |
|
| - | 355 | } |
|
| - | 356 | } |
|
| - | 357 | } |
|
| - | 358 | ||
| - | 359 | if (!found) { |
|
| - | 360 | /* Secondary hash (not) */ |
|
| - | 361 | uint32_t base2 = (~hash & 0x3ff) << 3; |
|
| - | 362 | ||
| - | 363 | /* Find colliding PTE in PTEG */ |
|
| - | 364 | for (i = 0; i < 8; i++) { |
|
| - | 365 | if ((phte_real[base2 + i].v) |
|
| - | 366 | && (phte_real[base2 + i].vsid == vsid) |
|
| - | 367 | && (phte_real[base2 + i].api == api) |
|
| - | 368 | && (phte_real[base2 + i].h == 1)) { |
|
| - | 369 | found = true; |
|
| - | 370 | base = base2; |
|
| - | 371 | h = 1; |
|
| - | 372 | break; |
|
| - | 373 | } |
|
| - | 374 | } |
|
| - | 375 | ||
| - | 376 | if (!found) { |
|
| - | 377 | /* Find unused PTE in PTEG */ |
|
| - | 378 | for (i = 0; i < 8; i++) { |
|
| - | 379 | if (!phte_real[base2 + i].v) { |
|
| - | 380 | found = true; |
|
| - | 381 | base = base2; |
|
| - | 382 | h = 1; |
|
| - | 383 | break; |
|
| - | 384 | } |
|
| - | 385 | } |
|
| - | 386 | } |
|
| - | 387 | ||
| - | 388 | if (!found) { |
|
| - | 389 | /* Use secondary hash to avoid collisions |
|
| - | 390 | with usual PHT refill handler. */ |
|
| - | 391 | i = RANDI(seed_real) % 8; |
|
| - | 392 | base = base2; |
|
| - | 393 | h = 1; |
|
| - | 394 | } |
|
| - | 395 | } |
|
| - | 396 | ||
| - | 397 | phte_real[base + i].v = 1; |
|
| - | 398 | phte_real[base + i].vsid = vsid; |
|
| - | 399 | phte_real[base + i].h = h; |
|
| - | 400 | phte_real[base + i].api = api; |
|
| - | 401 | phte_real[base + i].rpn = KA2PA(badvaddr) >> 12; |
|
| - | 402 | phte_real[base + i].r = 0; |
|
| - | 403 | phte_real[base + i].c = 0; |
|
| - | 404 | phte_real[base + i].wimg = 0; |
|
| - | 405 | phte_real[base + i].pp = 2; // FIXME |
|
| - | 406 | ||
| 362 | return false; |
407 | return true; |
| - | 408 | } |
|
| - | 409 | ||
| - | 410 | ||
| - | 411 | /** Process ITLB/DTLB Miss Exception in Real Mode |
|
| - | 412 | * |
|
| - | 413 | * |
|
| - | 414 | */ |
|
| - | 415 | void tlb_refill_real(int n, uint32_t tlbmiss, ptehi_t ptehi, ptelo_t ptelo, istate_t *istate) |
|
| - | 416 | { |
|
| - | 417 | uint32_t badvaddr = tlbmiss & 0xfffffffc; |
|
| - | 418 | ||
| - | 419 | uint32_t physmem; |
|
| - | 420 | asm volatile ( |
|
| - | 421 | "mfsprg3 %0\n" |
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| - | 422 | : "=r" (physmem) |
|
| - | 423 | ); |
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| - | 424 | ||
| - | 425 | if ((badvaddr < PA2KA(0)) || (badvaddr >= PA2KA(physmem))) |
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| - | 426 | return; // FIXME |
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| - | 427 | ||
| - | 428 | ptelo.rpn = KA2PA(badvaddr) >> 12; |
|
| - | 429 | ptelo.wimg = 0; |
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| - | 430 | ptelo.pp = 2; // FIXME |
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| - | 431 | ||
| - | 432 | uint32_t index = 0; |
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| - | 433 | asm volatile ( |
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| - | 434 | "mtspr 981, %0\n" |
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| - | 435 | "mtspr 982, %1\n" |
|
| - | 436 | "tlbld %2\n" |
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| - | 437 | "tlbli %2\n" |
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| - | 438 | : "=r" (index) |
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| - | 439 | : "r" (ptehi), |
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| - | 440 | "r" (ptelo) |
|
| - | 441 | ); |
|
| 363 | } |
442 | } |
| 364 | 443 | ||
| 365 | 444 | ||
| 366 | void tlb_arch_init(void) |
445 | void tlb_arch_init(void) |
| 367 | { |
446 | { |
| Line 369... | Line 448... | ||
| 369 | } |
448 | } |
| 370 | 449 | ||
| 371 | 450 | ||
| 372 | void tlb_invalidate_all(void) |
451 | void tlb_invalidate_all(void) |
| 373 | { |
452 | { |
| - | 453 | uint32_t index; |
|
| 374 | asm volatile ( |
454 | asm volatile ( |
| - | 455 | "li %0, 0\n" |
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| - | 456 | "sync\n" |
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| - | 457 | ||
| - | 458 | TLB_FLUSH |
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| - | 459 | TLB_FLUSH |
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| - | 460 | TLB_FLUSH |
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| - | 461 | TLB_FLUSH |
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| - | 462 | TLB_FLUSH |
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| - | 463 | TLB_FLUSH |
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| - | 464 | TLB_FLUSH |
|
| - | 465 | TLB_FLUSH |
|
| - | 466 | ||
| - | 467 | TLB_FLUSH |
|
| - | 468 | TLB_FLUSH |
|
| - | 469 | TLB_FLUSH |
|
| - | 470 | TLB_FLUSH |
|
| - | 471 | TLB_FLUSH |
|
| - | 472 | TLB_FLUSH |
|
| - | 473 | TLB_FLUSH |
|
| - | 474 | TLB_FLUSH |
|
| - | 475 | ||
| - | 476 | TLB_FLUSH |
|
| - | 477 | TLB_FLUSH |
|
| - | 478 | TLB_FLUSH |
|
| - | 479 | TLB_FLUSH |
|
| - | 480 | TLB_FLUSH |
|
| - | 481 | TLB_FLUSH |
|
| - | 482 | TLB_FLUSH |
|
| - | 483 | TLB_FLUSH |
|
| - | 484 | ||
| - | 485 | TLB_FLUSH |
|
| - | 486 | TLB_FLUSH |
|
| - | 487 | TLB_FLUSH |
|
| - | 488 | TLB_FLUSH |
|
| - | 489 | TLB_FLUSH |
|
| - | 490 | TLB_FLUSH |
|
| - | 491 | TLB_FLUSH |
|
| - | 492 | TLB_FLUSH |
|
| - | 493 | ||
| - | 494 | TLB_FLUSH |
|
| - | 495 | TLB_FLUSH |
|
| - | 496 | TLB_FLUSH |
|
| - | 497 | TLB_FLUSH |
|
| - | 498 | TLB_FLUSH |
|
| - | 499 | TLB_FLUSH |
|
| - | 500 | TLB_FLUSH |
|
| - | 501 | TLB_FLUSH |
|
| - | 502 | ||
| - | 503 | TLB_FLUSH |
|
| - | 504 | TLB_FLUSH |
|
| - | 505 | TLB_FLUSH |
|
| - | 506 | TLB_FLUSH |
|
| - | 507 | TLB_FLUSH |
|
| - | 508 | TLB_FLUSH |
|
| - | 509 | TLB_FLUSH |
|
| - | 510 | TLB_FLUSH |
|
| - | 511 | ||
| - | 512 | TLB_FLUSH |
|
| - | 513 | TLB_FLUSH |
|
| - | 514 | TLB_FLUSH |
|
| - | 515 | TLB_FLUSH |
|
| - | 516 | TLB_FLUSH |
|
| - | 517 | TLB_FLUSH |
|
| - | 518 | TLB_FLUSH |
|
| - | 519 | TLB_FLUSH |
|
| - | 520 | ||
| - | 521 | TLB_FLUSH |
|
| - | 522 | TLB_FLUSH |
|
| - | 523 | TLB_FLUSH |
|
| - | 524 | TLB_FLUSH |
|
| - | 525 | TLB_FLUSH |
|
| - | 526 | TLB_FLUSH |
|
| - | 527 | TLB_FLUSH |
|
| - | 528 | TLB_FLUSH |
|
| - | 529 | ||
| 375 | "tlbia\n" |
530 | "eieio\n" |
| 376 | "tlbsync\n" |
531 | "tlbsync\n" |
| - | 532 | "sync\n" |
|
| - | 533 | : "=r" (index) |
|
| 377 | ); |
534 | ); |
| 378 | } |
535 | } |
| 379 | 536 | ||
| 380 | 537 | ||
| 381 | void tlb_invalidate_asid(asid_t asid) |
538 | void tlb_invalidate_asid(asid_t asid) |
| Line 440... | Line 597... | ||
| 440 | asm volatile ( |
597 | asm volatile ( |
| 441 | "mfsrin %0, %1\n" |
598 | "mfsrin %0, %1\n" |
| 442 | : "=r" (vsid) |
599 | : "=r" (vsid) |
| 443 | : "r" (sr << 28) |
600 | : "r" (sr << 28) |
| 444 | ); |
601 | ); |
| 445 | printf("vsid[%d]: VSID=%.*p (ASID=%d)%s%s\n", sr, |
602 | printf("sr[%02u]: vsid=%.*p (asid=%u)%s%s\n", sr, |
| 446 | sizeof(vsid) * 2, vsid & 0xffffff, (vsid & 0xffffff) >> 4, |
603 | sizeof(vsid) * 2, vsid & 0xffffff, (vsid & 0xffffff) >> 4, |
| 447 | ((vsid >> 30) & 1) ? " supervisor" : "", |
604 | ((vsid >> 30) & 1) ? " supervisor" : "", |
| 448 | ((vsid >> 29) & 1) ? " user" : ""); |
605 | ((vsid >> 29) & 1) ? " user" : ""); |
| 449 | } |
606 | } |
| 450 | 607 | ||