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Rev 2927 | Rev 4342 | ||
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Line 112... | Line 112... | ||
112 | sw $s6,OFFSET_S6(\ctx) |
112 | sw $s6,OFFSET_S6(\ctx) |
113 | sw $s7,OFFSET_S7(\ctx) |
113 | sw $s7,OFFSET_S7(\ctx) |
114 | sw $s8,OFFSET_S8(\ctx) |
114 | sw $s8,OFFSET_S8(\ctx) |
115 | sw $gp,OFFSET_GP(\ctx) |
115 | sw $gp,OFFSET_GP(\ctx) |
116 | 116 | ||
117 | #ifndef KERNEL |
117 | #ifndef KERNEL |
118 | sw $k1,OFFSET_TLS(\ctx) |
118 | sw $k1,OFFSET_TLS(\ctx) |
119 | 119 | ||
120 | # ifdef CONFIG_MIPS_FPU |
120 | #ifdef CONFIG_FPU |
121 | mfc1 $t0,$20 |
121 | mfc1 $t0,$20 |
122 | sw $t0, OFFSET_F20(\ctx) |
122 | sw $t0, OFFSET_F20(\ctx) |
123 | 123 | ||
124 | mfc1 $t0,$21 |
124 | mfc1 $t0,$21 |
125 | sw $t0, OFFSET_F21(\ctx) |
125 | sw $t0, OFFSET_F21(\ctx) |
Line 148... | Line 148... | ||
148 | mfc1 $t0,$29 |
148 | mfc1 $t0,$29 |
149 | sw $t0, OFFSET_F29(\ctx) |
149 | sw $t0, OFFSET_F29(\ctx) |
150 | 150 | ||
151 | mfc1 $t0,$30 |
151 | mfc1 $t0,$30 |
152 | sw $t0, OFFSET_F30(\ctx) |
152 | sw $t0, OFFSET_F30(\ctx) |
153 | # endif /* CONFIG_MIPS_FPU */ |
153 | #endif /* CONFIG_FPU */ |
154 | #endif /* KERNEL */ |
154 | #endif /* KERNEL */ |
155 | 155 | ||
156 | sw $ra,OFFSET_PC(\ctx) |
156 | sw $ra,OFFSET_PC(\ctx) |
157 | sw $sp,OFFSET_SP(\ctx) |
157 | sw $sp,OFFSET_SP(\ctx) |
158 | .endm |
158 | .endm |
Line 170... | Line 170... | ||
170 | lw $s8,OFFSET_S8(\ctx) |
170 | lw $s8,OFFSET_S8(\ctx) |
171 | lw $gp,OFFSET_GP(\ctx) |
171 | lw $gp,OFFSET_GP(\ctx) |
172 | #ifndef KERNEL |
172 | #ifndef KERNEL |
173 | lw $k1,OFFSET_TLS(\ctx) |
173 | lw $k1,OFFSET_TLS(\ctx) |
174 | 174 | ||
175 | # ifdef CONFIG_MIPS_FPU |
175 | #ifdef CONFIG_FPU |
176 | lw $t0, OFFSET_F20(\ctx) |
176 | lw $t0, OFFSET_F20(\ctx) |
177 | mtc1 $t0,$20 |
177 | mtc1 $t0,$20 |
178 | 178 | ||
179 | lw $t0, OFFSET_F21(\ctx) |
179 | lw $t0, OFFSET_F21(\ctx) |
180 | mtc1 $t0,$21 |
180 | mtc1 $t0,$21 |
Line 203... | Line 203... | ||
203 | lw $t0, OFFSET_F29(\ctx) |
203 | lw $t0, OFFSET_F29(\ctx) |
204 | mtc1 $t0,$29 |
204 | mtc1 $t0,$29 |
205 | 205 | ||
206 | lw $t0, OFFSET_F30(\ctx) |
206 | lw $t0, OFFSET_F30(\ctx) |
207 | mtc1 $t0,$30 |
207 | mtc1 $t0,$30 |
208 | # endif /* CONFIG_MIPS_FPU */ |
208 | #endif /* CONFIG_FPU */ |
209 | - | ||
210 | #endif /* KERNEL */ |
209 | #endif /* KERNEL */ |
- | 210 | ||
211 | lw $ra,OFFSET_PC(\ctx) |
211 | lw $ra,OFFSET_PC(\ctx) |
212 | lw $sp,OFFSET_SP(\ctx) |
212 | lw $sp,OFFSET_SP(\ctx) |
213 | .endm |
213 | .endm |
214 | 214 | ||
215 | #endif |
215 | #endif |