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49 | #include <console/console.h> |
49 | #include <console/console.h> |
50 | #include <proc/uarg.h> |
50 | #include <proc/uarg.h> |
51 | #include <syscall/syscall.h> |
51 | #include <syscall/syscall.h> |
52 | #include <ddi/irq.h> |
52 | #include <ddi/irq.h> |
53 | #include <ddi/device.h> |
53 | #include <ddi/device.h> |
54 | #include <arch/drivers/ega.h> |
- | |
55 | #include <arch/bootinfo.h> |
54 | #include <arch/bootinfo.h> |
- | 55 | #include <arch/drivers/ega.h> |
|
- | 56 | #include <genarch/drivers/ega/ega.h> |
|
56 | #include <genarch/kbd/i8042.h> |
57 | #include <genarch/kbd/i8042.h> |
57 | #include <genarch/kbd/ns16550.h> |
58 | #include <genarch/kbd/ns16550.h> |
58 | #include <smp/smp.h> |
59 | #include <smp/smp.h> |
59 | #include <smp/ipi.h> |
60 | #include <smp/ipi.h> |
60 | #include <arch/atomic.h> |
61 | #include <arch/atomic.h> |
61 | #include <panic.h> |
62 | #include <panic.h> |
62 | #include <print.h> |
63 | #include <print.h> |
63 | #include <sysinfo/sysinfo.h> |
64 | #include <sysinfo/sysinfo.h> |
64 | 65 | ||
65 | /*NS16550 as a COM 1*/ |
66 | /* NS16550 as a COM 1 */ |
66 | #define NS16550_IRQ (4+LAGACY_INTERRUPT_BASE) |
67 | #define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE) |
67 | #define NS16550_PORT 0x3f8 |
68 | #define NS16550_PORT 0x3f8 |
68 | 69 | ||
69 | bootinfo_t *bootinfo; |
70 | bootinfo_t *bootinfo; |
70 | 71 | ||
71 | static uint64_t iosapic_base=0xfec00000; |
72 | static uint64_t iosapic_base = 0xfec00000; |
72 | 73 | ||
73 | void arch_pre_main(void) |
74 | void arch_pre_main(void) |
74 | { |
75 | { |
75 | /* Setup usermode init tasks. */ |
76 | /* Setup usermode init tasks. */ |
76 | 77 | ||
77 | //#ifdef I460GX |
- | |
78 | unsigned int i; |
78 | unsigned int i; |
79 | 79 | ||
80 | init.cnt = bootinfo->taskmap.count; |
80 | init.cnt = bootinfo->taskmap.count; |
81 | 81 | ||
82 | for (i = 0; i < init.cnt; i++) { |
82 | for (i = 0; i < init.cnt; i++) { |
- | 83 | init.tasks[i].addr = |
|
83 | init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) | VRN_MASK; |
84 | ((unsigned long) bootinfo->taskmap.tasks[i].addr) | |
- | 85 | VRN_MASK; |
|
84 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size; |
86 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size; |
85 | } |
87 | } |
86 | /* |
- | |
87 | #else |
- | |
88 | init.cnt = 8; |
- | |
89 | init.tasks[0].addr = INIT0_ADDRESS; |
- | |
90 | init.tasks[0].size = INIT0_SIZE; |
- | |
91 | init.tasks[1].addr = INIT0_ADDRESS + 0x400000; |
- | |
92 | init.tasks[1].size = INIT0_SIZE; |
- | |
93 | init.tasks[2].addr = INIT0_ADDRESS + 0x800000; |
- | |
94 | init.tasks[2].size = INIT0_SIZE; |
- | |
95 | init.tasks[3].addr = INIT0_ADDRESS + 0xc00000; |
- | |
96 | init.tasks[3].size = INIT0_SIZE; |
- | |
97 | init.tasks[4].addr = INIT0_ADDRESS + 0x1000000; |
- | |
98 | init.tasks[4].size = INIT0_SIZE; |
- | |
99 | init.tasks[5].addr = INIT0_ADDRESS + 0x1400000; |
- | |
100 | init.tasks[5].size = INIT0_SIZE; |
- | |
101 | init.tasks[6].addr = INIT0_ADDRESS + 0x1800000; |
- | |
102 | init.tasks[6].size = INIT0_SIZE; |
- | |
103 | init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000; |
- | |
104 | init.tasks[7].size = INIT0_SIZE; |
- | |
105 | #endif*/ |
- | |
106 | } |
88 | } |
107 | 89 | ||
108 | void arch_pre_mm_init(void) |
90 | void arch_pre_mm_init(void) |
109 | { |
91 | { |
- | 92 | /* |
|
110 | /* Set Interruption Vector Address (i.e. location of interruption vector table). */ |
93 | * Set Interruption Vector Address (i.e. location of interruption vector |
- | 94 | * table). |
|
- | 95 | */ |
|
111 | iva_write((uintptr_t) &ivt); |
96 | iva_write((uintptr_t) &ivt); |
112 | srlz_d(); |
97 | srlz_d(); |
113 | 98 | ||
114 | } |
99 | } |
115 | 100 | ||
116 | static void iosapic_init(void) |
101 | static void iosapic_init(void) |
117 | { |
102 | { |
118 | - | ||
119 | uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base))|FW_OFFSET; |
103 | uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET; |
120 | int i; |
104 | int i; |
121 | 105 | ||
122 | int myid,myeid; |
106 | int myid, myeid; |
123 | 107 | ||
124 | myid=ia64_get_cpu_id(); |
108 | myid = ia64_get_cpu_id(); |
125 | myeid=ia64_get_cpu_eid(); |
109 | myeid = ia64_get_cpu_eid(); |
126 | 110 | ||
127 | for(i=0;i<16;i++) |
111 | for (i = 0; i < 16; i++) { |
128 | { |
112 | if (i == 2) |
129 | - | ||
130 | if(i==2) continue; //Disable Cascade interrupt |
113 | continue; /* Disable Cascade interrupt */ |
131 | ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i; |
114 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i; |
132 | srlz_d(); |
115 | srlz_d(); |
133 | ((uint32_t*)(IOSAPIC+0x10))[0]=LAGACY_INTERRUPT_BASE+i; |
116 | ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i; |
134 | srlz_d(); |
117 | srlz_d(); |
135 | ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i+1; |
118 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1; |
136 | srlz_d(); |
119 | srlz_d(); |
137 | ((uint32_t*)(IOSAPIC+0x10))[0]=myid<<(56-32) | myeid<<(48-32); |
120 | ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) | |
- | 121 | myeid << (48 - 32); |
|
138 | srlz_d(); |
122 | srlz_d(); |
139 | } |
123 | } |
140 | 124 | ||
141 | } |
125 | } |
142 | 126 | ||
143 | 127 | ||
144 | void arch_post_mm_init(void) |
128 | void arch_post_mm_init(void) |
145 | { |
129 | { |
146 | if(config.cpu_active==1) |
130 | if (config.cpu_active == 1) { |
147 | { |
- | |
148 | iosapic_init(); |
131 | iosapic_init(); |
149 | - | ||
150 | irq_init(INR_COUNT, INR_COUNT); |
132 | irq_init(INR_COUNT, INR_COUNT); |
151 | #ifdef SKI |
133 | #ifdef SKI |
152 | ski_init_console(); |
134 | ski_init_console(); |
153 | #else |
135 | #else |
154 | ega_init(); |
136 | ega_init(EGA_BASE, EGA_VIDEORAM); |
155 | #endif |
137 | #endif |
156 | } |
138 | } |
157 | it_init(); |
139 | it_init(); |
158 | 140 | ||
159 | } |
141 | } |
Line 185... | Line 167... | ||
185 | thread_usleep(POLL_INTERVAL); |
167 | thread_usleep(POLL_INTERVAL); |
186 | } |
168 | } |
187 | } |
169 | } |
188 | #endif |
170 | #endif |
189 | 171 | ||
190 | - | ||
191 | void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused))); |
- | |
192 | void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused))) |
- | |
193 | { |
- | |
194 | return; |
- | |
195 | } |
- | |
196 | - | ||
197 | - | ||
198 | void arch_post_smp_init(void) |
172 | void arch_post_smp_init(void) |
199 | { |
173 | { |
- | 174 | thread_t *t; |
|
200 | 175 | ||
201 | { |
- | |
202 | /* |
176 | /* |
203 | * Create thread that polls keyboard. |
177 | * Create thread that polls keyboard. |
204 | */ |
178 | */ |
205 | #ifdef SKI |
179 | #ifdef SKI |
206 | thread_t *t; |
- | |
207 | t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
180 | t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
208 | if (!t) |
181 | if (!t) |
209 | panic("cannot create kkbdpoll\n"); |
182 | panic("cannot create kkbdpoll\n"); |
210 | thread_ready(t); |
183 | thread_ready(t); |
211 | #endif |
184 | #endif |
212 | 185 | ||
213 | #ifdef I460GX |
186 | #ifdef I460GX |
214 | devno_t kbd = device_assign_devno(); |
187 | devno_t kbd = device_assign_devno(); |
215 | /* keyboard controller */ |
- | |
216 | 188 | ||
217 | #ifdef CONFIG_NS16550 |
189 | #ifdef CONFIG_NS16550 |
218 | ns16550_init(kbd, NS16550_PORT, NS16550_IRQ,end_of_irq_void,NULL); // as a COM 1 |
190 | ns16550_init(kbd, NS16550_PORT, NS16550_IRQ, NULL, NULL); |
219 | #else |
191 | #else |
220 | devno_t mouse = device_assign_devno(); |
192 | devno_t mouse = device_assign_devno(); |
221 | i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE); |
193 | i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE); |
222 | #endif |
194 | #endif |
223 | thread_t *t; |
- | |
224 | t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
195 | t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
225 | if (!t) |
196 | if (!t) |
226 | panic("cannot create kkbdpoll\n"); |
197 | panic("cannot create kkbdpoll\n"); |
227 | thread_ready(t); |
198 | thread_ready(t); |
228 | - | ||
229 | #endif |
199 | #endif |
230 | 200 | ||
231 | } |
- | |
232 | - | ||
233 | sysinfo_set_item_val("ia64_iospace", NULL, true); |
201 | sysinfo_set_item_val("ia64_iospace", NULL, true); |
234 | sysinfo_set_item_val("ia64_iospace.address", NULL, true); |
202 | sysinfo_set_item_val("ia64_iospace.address", NULL, true); |
235 | sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET); |
203 | sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET); |
236 | - | ||
237 | - | ||
238 | - | ||
239 | - | ||
240 | - | ||
241 | } |
204 | } |
242 | 205 | ||
243 | 206 | ||
244 | /** Enter userspace and never return. */ |
207 | /** Enter userspace and never return. */ |
245 | void userspace(uspace_arg_t *kernel_uarg) |
208 | void userspace(uspace_arg_t *kernel_uarg) |
Line 247... | Line 210... | ||
247 | psr_t psr; |
210 | psr_t psr; |
248 | rsc_t rsc; |
211 | rsc_t rsc; |
249 | 212 | ||
250 | psr.value = psr_read(); |
213 | psr.value = psr_read(); |
251 | psr.cpl = PL_USER; |
214 | psr.cpl = PL_USER; |
252 | psr.i = true; /* start with interrupts enabled */ |
215 | psr.i = true; /* start with interrupts enabled */ |
253 | psr.ic = true; |
216 | psr.ic = true; |
254 | psr.ri = 0; /* start with instruction #0 */ |
217 | psr.ri = 0; /* start with instruction #0 */ |
255 | psr.bn = 1; /* start in bank 0 */ |
218 | psr.bn = 1; /* start in bank 0 */ |
256 | 219 | ||
257 | asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); |
220 | asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); |
258 | rsc.loadrs = 0; |
221 | rsc.loadrs = 0; |
259 | rsc.be = false; |
222 | rsc.be = false; |
260 | rsc.pl = PL_USER; |
223 | rsc.pl = PL_USER; |
261 | rsc.mode = 3; /* eager mode */ |
224 | rsc.mode = 3; /* eager mode */ |
262 | 225 | ||
263 | switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry, |
226 | switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry, |
264 | ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), |
227 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE - |
265 | ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE, |
228 | ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), |
266 | (uintptr_t) kernel_uarg->uspace_uarg, |
229 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE, |
267 | psr.value, rsc.value); |
230 | (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value); |
268 | 231 | ||
269 | while (1) { |
232 | while (1) |
270 | ; |
233 | ; |
271 | } |
- | |
272 | } |
234 | } |
273 | 235 | ||
274 | /** Set thread-local-storage pointer. |
236 | /** Set thread-local-storage pointer. |
275 | * |
237 | * |
276 | * We use r13 (a.k.a. tp) for this purpose. |
238 | * We use r13 (a.k.a. tp) for this purpose. |
Line 286... | Line 248... | ||
286 | void arch_grab_console(void) |
248 | void arch_grab_console(void) |
287 | { |
249 | { |
288 | #ifdef SKI |
250 | #ifdef SKI |
289 | ski_kbd_grab(); |
251 | ski_kbd_grab(); |
290 | #else |
252 | #else |
291 | #ifdef CONFIG_NS16550 |
253 | #ifdef CONFIG_NS16550 |
292 | ns16550_grab(); |
254 | ns16550_grab(); |
293 | #else |
255 | #else |
294 | i8042_grab(); |
256 | i8042_grab(); |
295 | #endif |
257 | #endif |
296 | #endif |
258 | #endif |
297 | } |
259 | } |
- | 260 | ||
298 | /** Return console to userspace |
261 | /** Return console to userspace |
299 | * |
262 | * |
300 | */ |
263 | */ |
301 | void arch_release_console(void) |
264 | void arch_release_console(void) |
302 | { |
265 | { |
303 | #ifdef SKI |
266 | #ifdef SKI |
304 | ski_kbd_release(); |
267 | ski_kbd_release(); |
305 | #else |
268 | #else |
306 | #ifdef CONFIG_NS16550 |
269 | #ifdef CONFIG_NS16550 |
307 | ns16550_release(); |
270 | ns16550_release(); |
308 | #else |
271 | #else |
309 | i8042_release(); |
272 | i8042_release(); |
310 | #endif |
273 | #endif |
311 | - | ||
312 | #endif |
274 | #endif |
313 | } |
275 | } |
314 | 276 | ||
315 | void arch_reboot(void) |
277 | void arch_reboot(void) |
316 | { |
278 | { |
317 | outb(0x64,0xfe); |
279 | outb(0x64, 0xfe); |
318 | while (1); |
280 | while (1) |
- | 281 | ; |
|
319 | } |
282 | } |
320 | 283 | ||
321 | /** @} |
284 | /** @} |
322 | */ |
285 | */ |