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/*
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/*
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 * Identification of CPUs.
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 * Identification of CPUs.
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 * Contains only non-MP-Specification specific SMP code.
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 * Contains only non-MP-Specification specific SMP code.
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 */
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 */
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#define AMD_CPUID_EBX   0x68747541
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#define AMD_CPUID_EBX  0x68747541
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#define AMD_CPUID_ECX   0x444d4163
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#define AMD_CPUID_ECX  0x444d4163
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#define AMD_CPUID_EDX   0x69746e65
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#define AMD_CPUID_EDX  0x69746e65
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#define INTEL_CPUID_EBX 0x756e6547
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#define INTEL_CPUID_EBX  0x756e6547
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#define INTEL_CPUID_ECX 0x6c65746e
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#define INTEL_CPUID_ECX  0x6c65746e
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#define INTEL_CPUID_EDX 0x49656e69
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#define INTEL_CPUID_EDX  0x49656e69
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enum vendor {
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enum vendor {
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    VendorUnknown=0,
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    VendorUnknown = 0,
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    VendorAMD,
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    VendorAMD,
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    VendorIntel
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    VendorIntel
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};
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};
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static char *vendor_str[] = {
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static char *vendor_str[] = {
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};
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};
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void fpu_disable(void)
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void fpu_disable(void)
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{
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{
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    asm volatile (
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    asm volatile (
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        "mov %%cr0,%%eax;"
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        "mov %%cr0, %%eax\n"
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        "or $8,%%eax;"
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        "or $8, %%eax\n"
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        "mov %%eax,%%cr0;"
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        "mov %%eax, %%cr0\n"
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        :
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        :
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        : "%eax"
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        ::: "%eax"
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    );
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    );
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}
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}
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void fpu_enable(void)
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void fpu_enable(void)
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{
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{
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    asm volatile (
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    asm volatile (
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        "mov %%cr0,%%eax;"
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        "mov %%cr0, %%eax\n"
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        "and $0xffFFffF7,%%eax;"
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        "and $0xffFFffF7, %%eax\n"
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        "mov %%eax,%%cr0;"
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        "mov %%eax,%%cr0\n"
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        :
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        :
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        : "%eax"
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        ::: "%eax"
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    ); 
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    );
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}
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}
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void cpu_arch_init(void)
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void cpu_arch_init(void)
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{
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{
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    cpuid_feature_info fi;
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    cpuid_feature_info fi;
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    cpu_info_t info;
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    cpu_info_t info;
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    uint32_t help = 0;
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    uint32_t help = 0;
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    CPU->arch.tss = tss_p;
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    CPU->arch.tss = tss_p;
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    CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((uint8_t *) CPU->arch.tss);
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    CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((uint8_t *) CPU->arch.tss);
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    CPU->fpu_owner = NULL;
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    CPU->fpu_owner = NULL;
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    cpuid(1, &info);
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    cpuid(1, &info);
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    fi.word = info.cpuid_edx;
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    fi.word = info.cpuid_edx;
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    efi.word = info.cpuid_ecx;
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    efi.word = info.cpuid_ecx;
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    if (fi.bits.fxsr)
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    if (fi.bits.fxsr)
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        fpu_fxsr();
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        fpu_fxsr();
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    else
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    else
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        fpu_fsr(); 
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        fpu_fsr();
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    if (fi.bits.sse) {
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    if (fi.bits.sse) {
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        asm volatile (
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        asm volatile (
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            "mov %%cr4,%0\n"
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            "mov %%cr4, %[help]\n"
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            "or %1,%0\n"
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            "or %[mask], %[help]\n"
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            "mov %0,%%cr4\n"
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            "mov %[help], %%cr4\n"
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            : "+r" (help)
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            : [help] "+r" (help)
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            : "i" (CR4_OSFXSR_MASK|(1<<10))
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            : [mask] "i" (CR4_OSFXSR_MASK | (1 << 10))
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        );
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        );
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    }
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    }
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    /* Setup fast SYSENTER/SYSEXIT syscalls */
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    /* Setup fast SYSENTER/SYSEXIT syscalls */
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    syscall_setup_cpu();
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    syscall_setup_cpu();