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49 | #define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") |
49 | #define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") |
50 | #define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") |
50 | #define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") |
51 | 51 | ||
52 | static inline void cpuid_serialization(void) |
52 | static inline void cpuid_serialization(void) |
53 | { |
53 | { |
- | 54 | #ifndef __PIC__ |
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54 | asm volatile ( |
55 | asm volatile ( |
55 | "xorl %%eax, %%eax\n" |
56 | "xorl %%eax, %%eax\n" |
56 | "cpuid\n" |
57 | "cpuid\n" |
57 | ::: "eax", "ebx", "ecx", "edx", "memory" |
58 | ::: "eax", "ebx", "ecx", "edx", "memory" |
58 | ); |
59 | ); |
- | 60 | #else |
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- | 61 | /* Must not clobber PIC register ebx */ |
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- | 62 | asm volatile ( |
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- | 63 | "movl %%ebx, %%esi\n" |
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- | 64 | "xorl %%eax, %%eax\n" |
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- | 65 | "cpuid\n" |
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- | 66 | "movl %%esi, %%ebx\n" |
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- | 67 | ::: "eax", "ecx", "edx", "esi", "memory" |
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- | 68 | ); |
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- | 69 | #endif |
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59 | } |
70 | } |
60 | 71 | ||
61 | #ifdef CONFIG_FENCES_P4 |
72 | #ifdef CONFIG_FENCES_P4 |
62 | # define memory_barrier() asm volatile ("mfence\n" ::: "memory") |
73 | # define memory_barrier() asm volatile ("mfence\n" ::: "memory") |
63 | # define read_barrier() asm volatile ("lfence\n" ::: "memory") |
74 | # define read_barrier() asm volatile ("lfence\n" ::: "memory") |