Subversion Repositories HelenOS

Rev

Rev 4346 | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 4346 Rev 4691
Line 33... Line 33...
33
 *  @brief Interrupts controlling routines.
33
 *  @brief Interrupts controlling routines.
34
 */
34
 */
35
 
35
 
36
#include <arch/asm.h>
36
#include <arch/asm.h>
37
#include <arch/regutils.h>
37
#include <arch/regutils.h>
38
#include <arch/drivers/gxemul.h>
-
 
39
#include <ddi/irq.h>
38
#include <ddi/irq.h>
40
#include <ddi/device.h>
39
#include <ddi/device.h>
41
#include <interrupt.h>
40
#include <interrupt.h>
42
 
41
 
-
 
42
#ifdef MACHINE_testarm
-
 
43
    #include <arch/mach/testarm/testarm.h>
-
 
44
#endif
-
 
45
 
-
 
46
#ifdef MACHINE_integratorcp
-
 
47
    #include <arch/mach/integratorcp/integratorcp.h>
-
 
48
#endif
-
 
49
 
43
/** Initial size of a table holding interrupt handlers. */
50
/** Initial size of a table holding interrupt handlers. */
44
#define IRQ_COUNT 8
51
#define IRQ_COUNT 8
45
 
52
 
46
static irq_t gxemul_timer_irq;
-
 
47
 
-
 
48
/** Disable interrupts.
53
/** Disable interrupts.
49
 *
54
 *
50
 * @return Old interrupt priority level.
55
 * @return Old interrupt priority level.
51
 */
56
 */
52
ipl_t interrupts_disable(void)
57
ipl_t interrupts_disable(void)
53
{
58
{
54
    ipl_t ipl = current_status_reg_read();
59
    ipl_t ipl = current_status_reg_read();
55
   
60
 
56
    current_status_reg_control_write(STATUS_REG_IRQ_DISABLED_BIT | ipl);
61
    current_status_reg_control_write(STATUS_REG_IRQ_DISABLED_BIT | ipl);
57
   
62
   
58
    return ipl;
63
    return ipl;
59
}
64
}
60
 
65
 
Line 63... Line 68...
63
 * @return Old interrupt priority level.
68
 * @return Old interrupt priority level.
64
 */
69
 */
65
ipl_t interrupts_enable(void)
70
ipl_t interrupts_enable(void)
66
{
71
{
67
    ipl_t ipl = current_status_reg_read();
72
    ipl_t ipl = current_status_reg_read();
68
   
73
 
69
    current_status_reg_control_write(ipl & ~STATUS_REG_IRQ_DISABLED_BIT);
74
    current_status_reg_control_write(ipl & ~STATUS_REG_IRQ_DISABLED_BIT);
70
   
75
   
71
    return ipl;
76
    return ipl;
72
}
77
}
73
 
78
 
Line 89... Line 94...
89
ipl_t interrupts_read(void)
94
ipl_t interrupts_read(void)
90
{
95
{
91
    return current_status_reg_read();
96
    return current_status_reg_read();
92
}
97
}
93
 
98
 
94
/** Starts gxemul Real Time Clock device, which asserts regular interrupts.
-
 
95
 *
-
 
96
 * @param frequency Interrupts frequency (0 disables RTC).
-
 
97
 */
-
 
98
static void gxemul_timer_start(uint32_t frequency)
-
 
99
{
-
 
100
    *((uint32_t *) (gxemul_rtc + GXEMUL_RTC_FREQ_OFFSET))
-
 
101
        = frequency;
-
 
102
}
-
 
103
 
-
 
104
static irq_ownership_t gxemul_timer_claim(irq_t *irq)
-
 
105
{
-
 
106
    return IRQ_ACCEPT;
-
 
107
}
-
 
108
 
-
 
109
/** Timer interrupt handler.
-
 
110
 *
-
 
111
 * @param irq Interrupt information.
-
 
112
 * @param arg Not used.
-
 
113
 */
-
 
114
static void gxemul_timer_irq_handler(irq_t *irq)
-
 
115
{
-
 
116
    /*
-
 
117
    * We are holding a lock which prevents preemption.
-
 
118
    * Release the lock, call clock() and reacquire the lock again.
-
 
119
    */
-
 
120
    spinlock_unlock(&irq->lock);
-
 
121
    clock();
-
 
122
    spinlock_lock(&irq->lock);
-
 
123
   
-
 
124
    /* acknowledge tick */
-
 
125
    *((uint32_t *) (gxemul_rtc + GXEMUL_RTC_ACK_OFFSET))
-
 
126
        = 0;
-
 
127
}
-
 
128
 
-
 
129
/** Initialize basic tables for exception dispatching
99
/** Initialize basic tables for exception dispatching
130
 * and starts the timer.
100
 * and starts the timer.
131
 */
101
 */
132
void interrupt_init(void)
102
void interrupt_init(void)
133
{
103
{
134
    irq_init(IRQ_COUNT, IRQ_COUNT);
104
    irq_init(IRQ_COUNT, IRQ_COUNT);
135
   
-
 
136
    irq_initialize(&gxemul_timer_irq);
-
 
137
    gxemul_timer_irq.devno = device_assign_devno();
-
 
138
    gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ;
-
 
139
    gxemul_timer_irq.claim = gxemul_timer_claim;
-
 
140
    gxemul_timer_irq.handler = gxemul_timer_irq_handler;
-
 
141
   
-
 
142
    irq_register(&gxemul_timer_irq);
105
    machine_timer_irq_start();
143
   
-
 
144
    gxemul_timer_start(GXEMUL_TIMER_FREQ);
-
 
145
}
106
}
146
 
107
 
147
/** @}
108
/** @}
148
 */
109
 */