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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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/** @addtogroup arm32  
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/** @addtogroup arm32
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 * @{
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 * @{
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 */
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 */
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/** @file
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/** @file
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 *  @brief Atomic operations.
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 *  @brief Atomic operations.
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 */
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 */
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#ifndef KERN_arm32_ATOMIC_H_
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#ifndef KERN_arm32_ATOMIC_H_
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#define KERN_arm32_ATOMIC_H_
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#define KERN_arm32_ATOMIC_H_
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 *
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 *
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 * @param val Where to add.
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 * @param val Where to add.
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 * @param i   Value to be added.
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 * @param i   Value to be added.
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 *
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 *
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 * @return Value after addition.
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 * @return Value after addition.
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 *
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 */
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 */
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static inline long atomic_add(atomic_t *val, int i)
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static inline long atomic_add(atomic_t *val, int i)
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{
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{
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    int ret;
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    int ret;
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    volatile long *mem = &(val->count);
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    volatile long *mem = &(val->count);
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    asm volatile (
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    asm volatile (
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    "1:\n"
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        "1:\n"
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        "ldr r2, [%1]       \n"
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            "ldr r2, [%[mem]]\n"
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        "add r3, r2, %2     \n"
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            "add r3, r2, %[i]\n"
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        "str r3, %0         \n"
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            "str r3, %[ret]\n"
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        "swp r3, r3, [%1]   \n"
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            "swp r3, r3, [%[mem]]\n"
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        "cmp r3, r2         \n"
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            "cmp r3, r2\n"
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        "bne 1b             \n"
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            "bne 1b\n"
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 - 
 
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        : "=m" (ret)
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        : [ret] "=m" (ret)
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        : "r" (mem), "r" (i)
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        : [mem] "r" (mem), [i] "r" (i)
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        : "r3", "r2"
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        : "r3", "r2"
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    );
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    );
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    return ret;
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    return ret;
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}
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}
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/** Atomic increment.
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/** Atomic increment.
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 *
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 *