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#include <arch/asm.h>
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#include <arch/asm.h>
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#include <console/chardev.h>
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#include <console/chardev.h>
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#include <mm/slab.h>
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#include <mm/slab.h>
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#include <ddi/device.h>
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#include <ddi/device.h>
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static indev_operations_t kbrdin_ops = {
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    .poll = NULL
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};
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#define i8042_SET_COMMAND  0x60
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#define i8042_SET_COMMAND  0x60
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#define i8042_COMMAND      0x69
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#define i8042_COMMAND      0x69
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#define i8042_CPU_RESET    0xfe
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#define i8042_CPU_RESET    0xfe
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#define i8042_BUFFER_FULL_MASK  0x01
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#define i8042_BUFFER_FULL_MASK  0x01
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    i8042_t *dev = instance->i8042;
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    i8042_t *dev = instance->i8042;
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    uint8_t status;
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    uint8_t status;
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    if (((status = pio_read_8(&dev->status)) & i8042_BUFFER_FULL_MASK)) {
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    if (((status = pio_read_8(&dev->status)) & i8042_BUFFER_FULL_MASK)) {
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        uint8_t data = pio_read_8(&dev->data);
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        uint8_t data = pio_read_8(&dev->data);
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        indev_push_character(&instance->kbrdin, data);
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        indev_push_character(instance->kbrdin, data);
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    }
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    }
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}
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}
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/**< Clear input buffer. */
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static void i8042_clear_buffer(i8042_t *dev)
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{
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    while (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK)
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        (void) pio_read_8(&dev->data);
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}
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/** Initialize i8042. */
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/** Initialize i8042. */
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indev_t *i8042_init(i8042_t *dev, inr_t inr)
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i8042_instance_t *i8042_init(i8042_t *dev, inr_t inr)
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{
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{
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    i8042_instance_t *instance
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    i8042_instance_t *instance
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        = malloc(sizeof(i8042_instance_t), FRAME_ATOMIC);
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        = malloc(sizeof(i8042_instance_t), FRAME_ATOMIC);
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    if (!instance)
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    if (instance) {
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        instance->i8042 = dev;
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        return NULL;
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        instance->kbrdin = NULL;
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    indev_initialize("i8042", &instance->kbrdin, &kbrdin_ops);
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        irq_initialize(&instance->irq);
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        instance->irq.devno = device_assign_devno();
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        instance->irq.inr = inr;
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        instance->irq.claim = i8042_claim;
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        instance->irq.handler = i8042_irq_handler;
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        instance->irq.instance = instance;
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    }
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    instance->i8042 = dev;
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    return instance;
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}
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void i8042_wire(i8042_instance_t *instance, indev_t *kbrdin)
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{
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    ASSERT(instance);
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    ASSERT(kbrdin);
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    irq_initialize(&instance->irq);
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    instance->irq.devno = device_assign_devno();
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    instance->irq.inr = inr;
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    instance->kbrdin = kbrdin;
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    instance->irq.claim = i8042_claim;
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    instance->irq.handler = i8042_irq_handler;
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    instance->irq.instance = instance;
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    irq_register(&instance->irq);
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    irq_register(&instance->irq);
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    /* Clear input buffer */
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    while (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK)
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        (void) pio_read_8(&dev->data);
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    return &instance->kbrdin;
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    i8042_clear_buffer(instance->i8042);
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}
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}
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/* Reset CPU by pulsing pin 0 */
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/* Reset CPU by pulsing pin 0 */
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void i8042_cpu_reset(i8042_t *dev)
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void i8042_cpu_reset(i8042_t *dev)
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{
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{
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    interrupts_disable();
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    interrupts_disable();
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    /* Clear input buffer */
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    i8042_clear_buffer(dev);
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    while (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK)
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        (void) pio_read_8(&dev->data);
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    /* Reset CPU */
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    /* Reset CPU */
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    pio_write_8(&dev->status, i8042_CPU_RESET);
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    pio_write_8(&dev->status, i8042_CPU_RESET);
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}
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}
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