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| Rev 4055 | Rev 4156 | ||
|---|---|---|---|
| Line 110... | Line 110... | ||
| 110 | d->offset_16_31 = offset >> 16; |
110 | d->offset_16_31 = offset >> 16; |
| 111 | } |
111 | } |
| 112 | 112 | ||
| 113 | void tss_initialize(tss_t *t) |
113 | void tss_initialize(tss_t *t) |
| 114 | { |
114 | { |
| 115 | memsetb(t, sizeof(struct tss), 0); |
115 | memsetb(t, sizeof(tss_t), 0); |
| 116 | } |
116 | } |
| 117 | 117 | ||
| 118 | /* |
118 | /* |
| 119 | * This function takes care of proper setup of IDT and IDTR. |
119 | * This function takes care of proper setup of IDT and IDTR. |
| 120 | */ |
120 | */ |
| Line 125... | Line 125... | ||
| 125 | 125 | ||
| 126 | for (i = 0; i < IDT_ITEMS; i++) { |
126 | for (i = 0; i < IDT_ITEMS; i++) { |
| 127 | d = &idt[i]; |
127 | d = &idt[i]; |
| 128 | 128 | ||
| 129 | d->unused = 0; |
129 | d->unused = 0; |
| 130 | d->selector = selector(KTEXT_DES); |
130 | d->selector = gdtselector(KTEXT_DES); |
| 131 | 131 | ||
| 132 | d->access = AR_PRESENT | AR_INTERRUPT; /* masking interrupt */ |
132 | d->access = AR_PRESENT | AR_INTERRUPT; /* masking interrupt */ |
| 133 | 133 | ||
| 134 | if (i == VECTOR_SYSCALL) { |
134 | if (i == VECTOR_SYSCALL) { |
| 135 | /* |
135 | /* |
| Line 212... | Line 212... | ||
| 212 | 212 | ||
| 213 | /* |
213 | /* |
| 214 | * As of this moment, the current CPU has its own GDT pointing |
214 | * As of this moment, the current CPU has its own GDT pointing |
| 215 | * to its own TSS. We just need to load the TR register. |
215 | * to its own TSS. We just need to load the TR register. |
| 216 | */ |
216 | */ |
| 217 | tr_load(selector(TSS_DES)); |
217 | tr_load(gdtselector(TSS_DES)); |
| 218 | 218 | ||
| 219 | clean_IOPL_NT_flags(); /* Disable I/O on nonprivileged levels and clear NT flag. */ |
219 | clean_IOPL_NT_flags(); /* Disable I/O on nonprivileged levels and clear NT flag. */ |
| 220 | clean_AM_flag(); /* Disable alignment check */ |
220 | clean_AM_flag(); /* Disable alignment check */ |
| 221 | } |
221 | } |
| 222 | 222 | ||