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Rev 3022 Rev 4055
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#
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#
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#include <stack.h>
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#include <stack.h>
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#include <register.h>
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#include <register.h>
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-
 
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.register       %g2, #scratch
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.register       %g3, #scratch
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.text
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.text
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.global halt
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.global halt
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.global memcpy
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.global memcpy
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.global jump_to_kernel
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.global jump_to_kernel
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halt:
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halt:
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	b halt
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	b halt
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	nop
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	nop
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memcpy:
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memcpy:
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	.register       %g2, #scratch
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	mov	%o0, %o3		! save dst
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        .register       %g3, #scratch
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	add	%o1, 7, %g1
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	add	%o1, 7, %g1
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	and	%g1, -8, %g1
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	and	%g1, -8, %g1
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	cmp	%o1, %g1
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	cmp	%o1, %g1
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	be,pn	%xcc, 3f
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	be,pn	%xcc, 3f
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	add	%o0, 7, %g1
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	add	%o0, 7, %g1
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	stb	%g1, [%g3 + %o0]
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	stb	%g1, [%g3 + %o0]
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	bne,pt	%xcc, 1b
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	bne,pt	%xcc, 1b
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	mov	%g2, %g3
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	mov	%g2, %g3
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2:
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2:
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	jmp	%o7 + 8			! exit point
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	jmp	%o7 + 8			! exit point
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	mov	%o1, %o0
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	mov	%o3, %o0
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3:
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3:
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	and	%g1, -8, %g1
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	and	%g1, -8, %g1
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	cmp	%o0, %g1
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	cmp	%o0, %g1
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	bne,pt	%xcc, 0b
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	bne,pt	%xcc, 0b
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	mov	0, %g3
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	mov	0, %g3
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	cmp	%o2, %g2
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	cmp	%o2, %g2
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	bne,pt	%xcc, 6b
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	bne,pt	%xcc, 6b
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	mov	%g2, %g3
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	mov	%g2, %g3
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	jmp	%o7 + 8			! exit point
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	jmp	%o7 + 8			! exit point
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	mov	%o1, %o0
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	mov	%o3, %o0
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jump_to_kernel:
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jump_to_kernel:
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	/*
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	 * We have copied code and now we need to guarantee cache coherence.
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	 * 1. Make sure that the code we have moved has drained to main memory.
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	 * 2. Invalidate I-cache.
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	 * 3. Flush instruction pipeline.
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	 */
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	/*
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	 * US3 processors have a write-invalidate cache, so explicitly
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	 * invalidating it is not required. Whether to invalidate I-cache
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	 * or not is decided according to the value of the global
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	 * "subarchitecture" variable (set in the bootstrap).
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	 */
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	set subarchitecture, %g2
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	ldub [%g2], %g2
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	cmp %g2, 3
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	be 1f
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	nop
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0:
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	call icache_flush
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	nop
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1:
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	membar #StoreStore
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	/*
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	 * Flush the instruction pipeline.
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	 */
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	flush	%i7
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	mov %o0, %l1
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	mov %o0, %l1
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	mov %o1, %o0
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	mov %o1, %o0
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	mov %o2, %o1
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	mov %o2, %o1
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	mov %o3, %o2
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	mov %o3, %o2
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	jmp %l1				! jump to kernel
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	jmp %l1				! jump to kernel
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	nop
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	nop
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#define ICACHE_SIZE		8192
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#define ICACHE_LINE_SIZE	32
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#define ICACHE_SET_BIT		(1 << 13)
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#define ASI_ICACHE_TAG		0x67
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# Flush I-cache
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icache_flush:
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	set	((ICACHE_SIZE - ICACHE_LINE_SIZE) | ICACHE_SET_BIT), %g1
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	stxa	%g0, [%g1] ASI_ICACHE_TAG
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0:	membar	#Sync
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	subcc	%g1, ICACHE_LINE_SIZE, %g1
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	bnz,pt	%xcc, 0b
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	stxa	%g0, [%g1] ASI_ICACHE_TAG
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	membar	#Sync
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	retl
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	! SF Erratum #51
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	nop
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.global ofw
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.global ofw
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ofw:
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ofw:
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	save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
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	save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
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	set ofw_cif, %l0
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	set ofw_cif, %l0
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	ldx [%l0], %l0
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	ldx [%l0], %l0