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| Rev 4665 | Rev 4666 | ||
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| 56 | #define EXC_VECTORS 8 |
56 | #define EXC_VECTORS 8 |
| 57 | 57 | ||
| 58 | /** Size of memory block occupied by exception vectors. */ |
58 | /** Size of memory block occupied by exception vectors. */ |
| 59 | #define EXC_VECTORS_SIZE (EXC_VECTORS * 4) |
59 | #define EXC_VECTORS_SIZE (EXC_VECTORS * 4) |
| 60 | 60 | ||
| 61 | /** Switches to kernel stack and saves all registers there. |
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| 62 | * |
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| 63 | * Temporary exception stack is used to save a few registers |
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| 64 | * before stack switch takes place. |
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| 65 | * |
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| 66 | * The stack fram created by the function looks like: |
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| 67 | * |
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| 68 | * |_________________| |
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| 69 | * | | |
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| 70 | * | SPSR | |
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| 71 | * | | |
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| 72 | * |_________________| |
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| 73 | * | Stack Pointer | |
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| 74 | * | of | |
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| 75 | * | Previous Mode | |
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| 76 | * |_________________| |
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| 77 | * | Return address | |
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| 78 | * | of | |
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| 79 | * | Previous Mode | |
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| 80 | * |_________________| |
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| 81 | * | R0 - R12 | |
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| 82 | * | of | |
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| 83 | * | Previous Mode | |
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| 84 | * |_________________| |
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| 85 | * | Return address | |
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| 86 | * | from | |
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| 87 | * |Exception Handler| |
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| 88 | * |_________________| |
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| 89 | * | | |
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| 90 | * |
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| 91 | */ |
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| 92 | inline static void setup_stack_and_save_regs() |
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| 93 | { |
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| 94 | asm volatile ( |
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| 95 | "ldr r13, =exc_stack\n" |
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| 96 | "stmfd r13!, {r0-r3}\n" |
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| 97 | "mrs r1, cpsr\n" |
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| 98 | "bic r1, r1, #0x1f\n" |
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| 99 | "mrs r2, spsr\n" |
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| 100 | "and r0, r2, #0x1f\n" |
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| 101 | "cmp r0, #0x10\n" |
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| 102 | "bne 1f\n" |
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| 103 | - | ||
| 104 | /* prev mode was usermode */ |
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| 105 | "mov r0, sp\n" |
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| 106 | "mov r3, lr\n" |
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| 107 | - | ||
| 108 | /* Switch to supervisor mode */ |
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| 109 | "orr r1, r1, #0x13\n" |
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| 110 | "msr cpsr_c, r1\n" |
- | |
| 111 | - | ||
| 112 | /* Load sp with [supervisor_sp] */ |
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| 113 | "ldr r13, =supervisor_sp\n" |
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| 114 | "ldr r13, [r13]\n" |
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| 115 | - | ||
| 116 | /* Populate the stack frame */ |
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| 117 | "msr spsr, r2\n" |
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| 118 | "mov lr, r3\n" |
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| 119 | "stmfd r13!, {lr}\n" |
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| 120 | "stmfd r13!, {r4-r12}\n" |
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| 121 | "ldmfd r0!, {r4-r7}\n" |
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| 122 | "stmfd r13!, {r4-r7}\n" |
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| 123 | "stmfd r13!, {r13, lr}^\n" |
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| 124 | "stmfd r13!, {r2}\n" |
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| 125 | "b 2f\n" |
- | |
| 126 | - | ||
| 127 | - | ||
| 128 | /* mode was not usermode */ |
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| 129 | "1:\n" |
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| 130 | /* Switch to previous mode which is undoubtedly the supervisor mode */ |
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| 131 | "orr r1, r1, r0\n" |
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| 132 | "mov r0, lr\n" |
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| 133 | "mov r3, sp\n" |
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| 134 | "msr cpsr_c, r1\n" |
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| 135 | - | ||
| 136 | /* Populate the stack frame */ |
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| 137 | "mov r1, sp\n" |
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| 138 | "stmfd r13!, {r0}\n" |
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| 139 | "stmfd r13!, {r4-r12}\n" |
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| 140 | - | ||
| 141 | /* Store r0-r3 in r4-r7 and then push it on to stack */ |
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| 142 | "ldmfd r3!, {r4-r7}\n" |
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| 143 | "stmfd r13!, {r4-r7}\n" |
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| 144 | - | ||
| 145 | /* Push return address and stack pointer on to stack */ |
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| 146 | "stmfd r13!, {lr}\n" |
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| 147 | "stmfd r13!, {r1}\n" |
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| 148 | "mov lr, r0\n" |
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| 149 | "msr spsr, r2\n" |
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| 150 | "stmfd r13!, {r2}\n" |
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| 151 | - | ||
| 152 | "2:\n" |
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| 153 | ); |
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| 154 | } |
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| 155 | - | ||
| 156 | /** Returns from exception mode. |
- | |
| 157 | * |
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| 158 | * Previously saved state of registers (including control register) |
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| 159 | * is restored from the stack. |
- | |
| 160 | */ |
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| 161 | inline static void load_regs() |
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| 162 | { |
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| 163 | asm volatile( |
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| 164 | "ldmfd r13!, {r0} \n" |
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| 165 | "msr spsr, r0 \n" |
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| 166 | "and r0, r0, #0x1f \n" |
- | |
| 167 | "cmp r0, #0x10 \n" |
- | |
| 168 | "bne 1f \n" |
- | |
| 169 | - | ||
| 170 | /* return to user mode */ |
- | |
| 171 | "ldmfd r13!, {r13, lr}^ \n" |
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| 172 | "b 2f \n" |
- | |
| 173 | - | ||
| 174 | /* return to non-user mode */ |
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| 175 | "1:\n" |
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| 176 | "ldmfd r13!, {r1, r2} \n" |
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| 177 | "mrs r3, cpsr \n" |
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| 178 | "bic r3, r3, #0x1f \n" |
- | |
| 179 | "orr r3, r3, r0 \n" |
- | |
| 180 | "mrs r0, cpsr \n" |
- | |
| 181 | "msr cpsr_c, r3 \n" |
- | |
| 182 | - | ||
| 183 | "mov lr, r2 \n" |
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| 184 | "msr cpsr_c, r0 \n" |
- | |
| 185 | - | ||
| 186 | /* actual return */ |
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| 187 | "2:\n" |
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| 188 | "ldmfd r13!, {r0-r12, pc}^\n" |
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| 189 | ); |
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| 190 | } |
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| 191 | - | ||
| 192 | - | ||
| 193 | /** Calls exception dispatch routine. */ |
- | |
| 194 | #define CALL_EXC_DISPATCH(exception) \ |
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| 195 | asm volatile ( \ |
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| 196 | "mov r0, %[exc]\n" \ |
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| 197 | "mov r1, r13\n" \ |
- | |
| 198 | "bl exc_dispatch\n" \ |
- | |
| 199 | :: [exc] "i" (exception) \ |
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| 200 | );\ |
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| 201 | - | ||
| 202 | /** General exception handler. |
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| 203 | * |
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| 204 | * Stores registers, dispatches the exception, |
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| 205 | * and finally restores registers and returns from exception processing. |
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| 206 | * |
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| 207 | * @param exception Exception number. |
- | |
| 208 | */ |
- | |
| 209 | #define PROCESS_EXCEPTION(exception) \ |
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| 210 | setup_stack_and_save_regs(); \ |
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| 211 | CALL_EXC_DISPATCH(exception) \ |
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| 212 | load_regs(); |
- | |
| 213 | - | ||
| 214 | /** Updates specified exception vector to jump to given handler. |
61 | /** Updates specified exception vector to jump to given handler. |
| 215 | * |
62 | * |
| 216 | * Addresses of handlers are stored in memory following exception vectors. |
63 | * Addresses of handlers are stored in memory following exception vectors. |
| 217 | */ |
64 | */ |
| 218 | static void install_handler(unsigned handler_addr, unsigned *vector) |
65 | static void install_handler(unsigned handler_addr, unsigned *vector) |
| Line 230... | Line 77... | ||
| 230 | /* store handler's address */ |
77 | /* store handler's address */ |
| 231 | *(vector + EXC_VECTORS) = handler_addr; |
78 | *(vector + EXC_VECTORS) = handler_addr; |
| 232 | 79 | ||
| 233 | } |
80 | } |
| 234 | 81 | ||
| 235 | /** Low-level Reset Exception handler. */ |
- | |
| 236 | static void reset_exception_entry(void) |
- | |
| 237 | { |
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| 238 | PROCESS_EXCEPTION(EXC_RESET); |
- | |
| 239 | } |
- | |
| 240 | - | ||
| 241 | /** Low-level Software Interrupt Exception handler. */ |
- | |
| 242 | static void swi_exception_entry(void) |
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| 243 | { |
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| 244 | PROCESS_EXCEPTION(EXC_SWI); |
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| 245 | } |
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| 246 | - | ||
| 247 | /** Low-level Undefined Instruction Exception handler. */ |
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| 248 | static void undef_instr_exception_entry(void) |
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| 249 | { |
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| 250 | PROCESS_EXCEPTION(EXC_UNDEF_INSTR); |
- | |
| 251 | } |
- | |
| 252 | - | ||
| 253 | /** Low-level Fast Interrupt Exception handler. */ |
- | |
| 254 | static void fiq_exception_entry(void) |
- | |
| 255 | { |
- | |
| 256 | PROCESS_EXCEPTION(EXC_FIQ); |
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| 257 | } |
- | |
| 258 | - | ||
| 259 | /** Low-level Prefetch Abort Exception handler. */ |
- | |
| 260 | static void prefetch_abort_exception_entry(void) |
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| 261 | { |
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| 262 | asm volatile ( |
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| 263 | "sub lr, lr, #4" |
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| 264 | ); |
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| 265 | - | ||
| 266 | PROCESS_EXCEPTION(EXC_PREFETCH_ABORT); |
- | |
| 267 | } |
- | |
| 268 | - | ||
| 269 | /** Low-level Data Abort Exception handler. */ |
- | |
| 270 | static void data_abort_exception_entry(void) |
- | |
| 271 | { |
- | |
| 272 | asm volatile ( |
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| 273 | "sub lr, lr, #8" |
- | |
| 274 | ); |
- | |
| 275 | - | ||
| 276 | PROCESS_EXCEPTION(EXC_DATA_ABORT); |
- | |
| 277 | } |
- | |
| 278 | - | ||
| 279 | /** Low-level Interrupt Exception handler. |
- | |
| 280 | * |
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| 281 | * CPU is switched to Undefined mode before further interrupt processing |
- | |
| 282 | * because of possible occurence of nested interrupt exception, which |
- | |
| 283 | * would overwrite (and thus spoil) stack pointer. |
- | |
| 284 | */ |
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| 285 | static void irq_exception_entry(void) |
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| 286 | { |
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| 287 | asm volatile ( |
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| 288 | "sub lr, lr, #4" |
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| 289 | ); |
- | |
| 290 | - | ||
| 291 | PROCESS_EXCEPTION(EXC_IRQ) |
- | |
| 292 | } |
- | |
| 293 | - | ||
| 294 | /** Software Interrupt handler. |
82 | /** Software Interrupt handler. |
| 295 | * |
83 | * |
| 296 | * Dispatches the syscall. |
84 | * Dispatches the syscall. |
| 297 | */ |
85 | */ |
| 298 | static void swi_exception(int exc_no, istate_t *istate) |
86 | static void swi_exception(int exc_no, istate_t *istate) |