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| 29 | /** @addtogroup arm32 |
29 | /** @addtogroup arm32 |
| 30 | * @{ |
30 | * @{ |
| 31 | */ |
31 | */ |
| 32 | /** |
32 | /** |
| 33 | * @file |
33 | * @file |
| 34 | * @brief Utilities for convenient manipulation with ARM registries. |
34 | * @brief Utilities for convenient manipulation with ARM registers. |
| 35 | */ |
35 | */ |
| 36 | 36 | ||
| 37 | #ifndef KERN_arm32_REGUTILS_H_ |
37 | #ifndef KERN_arm32_REGUTILS_H_ |
| 38 | #define KERN_arm32_REGUTILS_H_ |
38 | #define KERN_arm32_REGUTILS_H_ |
| 39 | 39 | ||
| 40 | - | ||
| 41 | #define STATUS_REG_IE_ENABLED_BIT (1 << 7) |
40 | #define STATUS_REG_IE_ENABLED_BIT (1 << 7) |
| 42 | #define STATUS_REG_MODE_MASK 0x1F |
41 | #define STATUS_REG_MODE_MASK 0x1F |
| 43 | 42 | ||
| - | 43 | #define CP15_R1_HIGH_VECTORS_BIT (1 << 13) |
|
| - | 44 | ||
| - | 45 | ||
| 44 | /* ARM Processor Operation Modes */ |
46 | /* ARM Processor Operation Modes */ |
| 45 | #define USER_MODE 0x10 |
47 | #define USER_MODE 0x10 |
| 46 | #define FIQ_MODE 0x11 |
48 | #define FIQ_MODE 0x11 |
| 47 | #define IRQ_MODE 0x12 |
49 | #define IRQ_MODE 0x12 |
| 48 | #define SUPERVISOR_MODE 0x13 |
50 | #define SUPERVISOR_MODE 0x13 |