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| Rev | Author | Line No. | Line |
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| 1301 | jermar | 1 | /* |
| 2 | * The PCI Library -- Direct Configuration access via i386 Ports |
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| 3 | * |
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| 4 | * Copyright (c) 1997--2004 Martin Mares <mj@ucw.cz> |
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| 5 | * |
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| 6 | * Modified and ported to HelenOS by Jakub Jermar. |
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| 7 | * |
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| 8 | * Can be freely distributed and used under the terms of the GNU GPL. |
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| 9 | */ |
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| 10 | |||
| 11 | #include <unistd.h> |
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| 12 | |||
| 13 | #include "internal.h" |
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| 14 | |||
| 15 | static inline void outb(u8 b, u16 port) |
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| 16 | { |
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| 17 | asm volatile ("outb %0, %1\n" : : "a" (b), "d" (port)); |
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| 18 | } |
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| 19 | |||
| 20 | static inline void outw(u16 w, u16 port) |
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| 21 | { |
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| 22 | asm volatile ("outw %0, %1\n" : : "a" (w), "d" (port)); |
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| 23 | } |
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| 24 | |||
| 25 | static inline void outl(u32 l, u16 port) |
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| 26 | { |
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| 27 | asm volatile ("outl %0, %1\n" : : "a" (l), "d" (port)); |
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| 28 | } |
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| 29 | |||
| 30 | static inline u8 inb(u16 port) |
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| 31 | { |
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| 32 | u8 val; |
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| 33 | |||
| 34 | asm volatile ("inb %1, %0 \n" : "=a" (val) : "d" (port)); |
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| 35 | return val; |
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| 36 | } |
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| 37 | |||
| 38 | static inline u16 inw(u16 port) |
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| 39 | { |
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| 40 | u16 val; |
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| 41 | |||
| 42 | asm volatile ("inw %1, %0 \n" : "=a" (val) : "d" (port)); |
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| 43 | return val; |
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| 44 | } |
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| 45 | |||
| 46 | static inline u32 inl(u16 port) |
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| 47 | { |
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| 48 | u32 val; |
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| 49 | |||
| 50 | asm volatile ("inl %1, %0 \n" : "=a" (val) : "d" (port)); |
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| 51 | return val; |
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| 52 | } |
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| 53 | |||
| 54 | static void |
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| 55 | conf12_init(struct pci_access *a) |
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| 56 | { |
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| 57 | } |
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| 58 | |||
| 59 | static void |
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| 60 | conf12_cleanup(struct pci_access *a UNUSED) |
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| 61 | { |
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| 62 | } |
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| 63 | |||
| 64 | /* |
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| 65 | * Before we decide to use direct hardware access mechanisms, we try to do some |
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| 66 | * trivial checks to ensure it at least _seems_ to be working -- we just test |
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| 67 | * whether bus 00 contains a host bridge (this is similar to checking |
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| 68 | * techniques used in XFree86, but ours should be more reliable since we |
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| 69 | * attempt to make use of direct access hints provided by the PCI BIOS). |
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| 70 | * |
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| 71 | * This should be close to trivial, but it isn't, because there are buggy |
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| 72 | * chipsets (yes, you guessed it, by Intel and Compaq) that have no class ID. |
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| 73 | */ |
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| 74 | |||
| 75 | static int |
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| 76 | intel_sanity_check(struct pci_access *a, struct pci_methods *m) |
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| 77 | { |
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| 78 | struct pci_dev d; |
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| 79 | |||
| 80 | a->debug("...sanity check"); |
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| 81 | d.bus = 0; |
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| 82 | d.func = 0; |
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| 83 | for(d.dev = 0; d.dev < 32; d.dev++) |
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| 84 | { |
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| 85 | u16 class, vendor; |
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| 86 | if (m->read(&d, PCI_CLASS_DEVICE, (byte *) &class, sizeof(class)) && |
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| 87 | (class == cpu_to_le16(PCI_CLASS_BRIDGE_HOST) || class == cpu_to_le16(PCI_CLASS_DISPLAY_VGA)) || |
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| 88 | m->read(&d, PCI_VENDOR_ID, (byte *) &vendor, sizeof(vendor)) && |
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| 89 | (vendor == cpu_to_le16(PCI_VENDOR_ID_INTEL) || vendor == cpu_to_le16(PCI_VENDOR_ID_COMPAQ))) |
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| 90 | { |
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| 91 | a->debug("...outside the Asylum at 0/%02x/0", d.dev); |
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| 92 | return 1; |
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| 93 | } |
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| 94 | } |
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| 95 | a->debug("...insane"); |
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| 96 | return 0; |
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| 97 | } |
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| 98 | |||
| 99 | /* |
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| 100 | * Configuration type 1 |
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| 101 | */ |
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| 102 | |||
| 103 | #define CONFIG_CMD(bus, device_fn, where) (0x80000000 | (bus << 16) | (device_fn << 8) | (where & ~3)) |
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| 104 | |||
| 105 | static int |
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| 106 | conf1_detect(struct pci_access *a) |
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| 107 | { |
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| 108 | unsigned int tmp; |
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| 109 | int res = 0; |
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| 110 | |||
| 111 | outb (0x01, 0xCFB); |
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| 112 | tmp = inl (0xCF8); |
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| 113 | outl (0x80000000, 0xCF8); |
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| 114 | if (inl (0xCF8) == 0x80000000) |
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| 115 | res = 1; |
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| 116 | outl (tmp, 0xCF8); |
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| 117 | if (res) |
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| 118 | res = intel_sanity_check(a, &pm_intel_conf1); |
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| 119 | return res; |
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| 120 | } |
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| 121 | |||
| 122 | static int |
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| 123 | conf1_read(struct pci_dev *d, int pos, byte *buf, int len) |
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| 124 | { |
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| 125 | int addr = 0xcfc + (pos&3); |
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| 126 | |||
| 127 | if (pos >= 256) |
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| 128 | return 0; |
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| 129 | |||
| 130 | outl(0x80000000 | ((d->bus & 0xff) << 16) | (PCI_DEVFN(d->dev, d->func) << 8) | (pos&~3), 0xcf8); |
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| 131 | |||
| 132 | switch (len) |
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| 133 | { |
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| 134 | case 1: |
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| 135 | buf[0] = inb(addr); |
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| 136 | break; |
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| 137 | case 2: |
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| 138 | ((u16 *) buf)[0] = cpu_to_le16(inw(addr)); |
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| 139 | break; |
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| 140 | case 4: |
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| 141 | ((u32 *) buf)[0] = cpu_to_le32(inl(addr)); |
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| 142 | break; |
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| 143 | default: |
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| 144 | return pci_generic_block_read(d, pos, buf, len); |
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| 145 | } |
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| 146 | return 1; |
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| 147 | } |
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| 148 | |||
| 149 | static int |
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| 150 | conf1_write(struct pci_dev *d, int pos, byte *buf, int len) |
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| 151 | { |
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| 152 | int addr = 0xcfc + (pos&3); |
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| 153 | |||
| 154 | if (pos >= 256) |
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| 155 | return 0; |
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| 156 | |||
| 157 | outl(0x80000000 | ((d->bus & 0xff) << 16) | (PCI_DEVFN(d->dev, d->func) << 8) | (pos&~3), 0xcf8); |
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| 158 | |||
| 159 | switch (len) |
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| 160 | { |
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| 161 | case 1: |
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| 162 | outb(buf[0], addr); |
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| 163 | break; |
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| 164 | case 2: |
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| 165 | outw(le16_to_cpu(((u16 *) buf)[0]), addr); |
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| 166 | break; |
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| 167 | case 4: |
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| 168 | outl(le32_to_cpu(((u32 *) buf)[0]), addr); |
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| 169 | break; |
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| 170 | default: |
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| 171 | return pci_generic_block_write(d, pos, buf, len); |
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| 172 | } |
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| 173 | return 1; |
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| 174 | } |
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| 175 | |||
| 176 | /* |
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| 177 | * Configuration type 2. Obsolete and brain-damaged, but existing. |
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| 178 | */ |
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| 179 | |||
| 180 | static int |
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| 181 | conf2_detect(struct pci_access *a) |
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| 182 | { |
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| 183 | /* This is ugly and tends to produce false positives. Beware. */ |
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| 184 | |||
| 185 | outb(0x00, 0xCFB); |
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| 186 | outb(0x00, 0xCF8); |
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| 187 | outb(0x00, 0xCFA); |
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| 188 | if (inb(0xCF8) == 0x00 && inb(0xCFA) == 0x00) |
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| 189 | return intel_sanity_check(a, &pm_intel_conf2); |
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| 190 | else |
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| 191 | return 0; |
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| 192 | } |
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| 193 | |||
| 194 | static int |
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| 195 | conf2_read(struct pci_dev *d, int pos, byte *buf, int len) |
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| 196 | { |
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| 197 | int addr = 0xc000 | (d->dev << 8) | pos; |
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| 198 | |||
| 199 | if (pos >= 256) |
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| 200 | return 0; |
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| 201 | |||
| 202 | if (d->dev >= 16) |
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| 203 | /* conf2 supports only 16 devices per bus */ |
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| 204 | return 0; |
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| 205 | outb((d->func << 1) | 0xf0, 0xcf8); |
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| 206 | outb(d->bus, 0xcfa); |
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| 207 | switch (len) |
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| 208 | { |
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| 209 | case 1: |
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| 210 | buf[0] = inb(addr); |
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| 211 | break; |
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| 212 | case 2: |
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| 213 | ((u16 *) buf)[0] = cpu_to_le16(inw(addr)); |
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| 214 | break; |
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| 215 | case 4: |
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| 216 | ((u32 *) buf)[0] = cpu_to_le32(inl(addr)); |
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| 217 | break; |
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| 218 | default: |
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| 219 | outb(0, 0xcf8); |
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| 220 | return pci_generic_block_read(d, pos, buf, len); |
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| 221 | } |
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| 222 | outb(0, 0xcf8); |
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| 223 | return 1; |
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| 224 | } |
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| 225 | |||
| 226 | static int |
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| 227 | conf2_write(struct pci_dev *d, int pos, byte *buf, int len) |
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| 228 | { |
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| 229 | int addr = 0xc000 | (d->dev << 8) | pos; |
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| 230 | |||
| 231 | if (pos >= 256) |
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| 232 | return 0; |
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| 233 | |||
| 234 | if (d->dev >= 16) |
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| 235 | d->access->error("conf2_write: only first 16 devices exist."); |
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| 236 | outb((d->func << 1) | 0xf0, 0xcf8); |
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| 237 | outb(d->bus, 0xcfa); |
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| 238 | switch (len) |
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| 239 | { |
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| 240 | case 1: |
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| 241 | outb(buf[0], addr); |
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| 242 | break; |
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| 243 | case 2: |
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| 244 | outw(le16_to_cpu(* (u16 *) buf), addr); |
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| 245 | break; |
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| 246 | case 4: |
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| 247 | outl(le32_to_cpu(* (u32 *) buf), addr); |
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| 248 | break; |
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| 249 | default: |
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| 250 | outb(0, 0xcf8); |
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| 251 | return pci_generic_block_write(d, pos, buf, len); |
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| 252 | } |
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| 253 | outb(0, 0xcf8); |
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| 254 | return 1; |
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| 255 | } |
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| 256 | |||
| 257 | struct pci_methods pm_intel_conf1 = { |
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| 258 | "Intel-conf1", |
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| 259 | NULL, /* config */ |
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| 260 | conf1_detect, |
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| 261 | conf12_init, |
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| 262 | conf12_cleanup, |
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| 263 | pci_generic_scan, |
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| 264 | pci_generic_fill_info, |
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| 265 | conf1_read, |
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| 266 | conf1_write, |
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| 267 | NULL, /* init_dev */ |
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| 268 | NULL /* cleanup_dev */ |
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| 269 | }; |
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| 270 | |||
| 271 | struct pci_methods pm_intel_conf2 = { |
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| 272 | "Intel-conf2", |
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| 273 | NULL, /* config */ |
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| 274 | conf2_detect, |
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| 275 | conf12_init, |
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| 276 | conf12_cleanup, |
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| 277 | pci_generic_scan, |
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| 278 | pci_generic_fill_info, |
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| 279 | conf2_read, |
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| 280 | conf2_write, |
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| 281 | NULL, /* init_dev */ |
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| 282 | NULL /* cleanup_dev */ |
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| 283 | }; |