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2019 decky 1 
/*
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 * Copyright (C) 2006 Martin Decky
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup test
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 * @{
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 */
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/** @file
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 */
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#include <test.h>
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test_t tests[] = {
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    {
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        "atomic1",
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        "Test atomic operations",
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        &test_atomic1,
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        true
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    },
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    {
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        "btree1",
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        "Test B-tree operations",
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        &test_btree1,
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        true
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    },
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    {
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        "mips1",
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        "MIPS debug test",
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        &test_mips1,
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        true
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    },
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    {
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        "fault1",
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        "Write to NULL (maybe page fault)",
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        &test_fault1,
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        false
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    },
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    {
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        "fpu1",
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        "Intel FPU test",
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        &test_fpu1,
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        true
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    },
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    {
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        "sse1",
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        "Intel SEE test",
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        &test_sse1,
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        true
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    },
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    {
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        "mips2",
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        "MIPS FPU test",
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        &test_mips2,
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        true
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    },
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    {
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        "falloc1",
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        "Frame allocator test 1",
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        &test_falloc1,
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        true
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    },
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    {
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        "falloc2",
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        "Frame allocator test 2",
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        &test_falloc2,
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        true
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    },
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    {
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        "mapping1",
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        "Mapping test",
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        &test_mapping1,
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        true
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    },
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    {
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        "slab1",
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        "SLAB test 1",
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        &test_slab1,
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        true
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    },
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    {
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        "slab2",
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        "SLAB test 2",
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        &test_slab2,
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        true
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    },
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    {
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        "purge1",
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        "Itanium TLB purge test",
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        &test_purge1,
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        true
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    },
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    {NULL, NULL, NULL}
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};
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/** @}
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 */