Rev 4042 | Rev 4148 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
|---|---|---|---|
| 1 | jermar | 1 | /* |
| 3982 | jermar | 2 | * Copyright (c) 2009 Jakub Jermar |
| 1 | jermar | 3 | * All rights reserved. |
| 4 | * |
||
| 5 | * Redistribution and use in source and binary forms, with or without |
||
| 6 | * modification, are permitted provided that the following conditions |
||
| 7 | * are met: |
||
| 8 | * |
||
| 9 | * - Redistributions of source code must retain the above copyright |
||
| 10 | * notice, this list of conditions and the following disclaimer. |
||
| 11 | * - Redistributions in binary form must reproduce the above copyright |
||
| 12 | * notice, this list of conditions and the following disclaimer in the |
||
| 13 | * documentation and/or other materials provided with the distribution. |
||
| 14 | * - The name of the author may not be used to endorse or promote products |
||
| 15 | * derived from this software without specific prior written permission. |
||
| 16 | * |
||
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
||
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
||
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
||
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
||
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
||
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
||
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
||
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
||
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
||
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||
| 27 | */ |
||
| 28 | |||
| 4094 | decky | 29 | /** @addtogroup genarch |
| 1702 | cejka | 30 | * @{ |
| 31 | */ |
||
| 1754 | jermar | 32 | /** |
| 1757 | jermar | 33 | * @file |
| 4094 | decky | 34 | * @brief Zilog 8530 serial controller driver. |
| 1702 | cejka | 35 | */ |
| 36 | |||
| 4042 | jermar | 37 | #include <genarch/drivers/z8530/z8530.h> |
| 511 | jermar | 38 | #include <console/chardev.h> |
| 3961 | jermar | 39 | #include <ddi/irq.h> |
| 40 | #include <arch/asm.h> |
||
| 41 | #include <mm/slab.h> |
||
| 1 | jermar | 42 | |
| 4094 | decky | 43 | indev_operations_t kbrdin_ops = { |
| 44 | .poll = NULL |
||
| 45 | }; |
||
| 46 | |||
| 3961 | jermar | 47 | static inline void z8530_write(ioport8_t *ctl, uint8_t reg, uint8_t val) |
| 48 | { |
||
| 49 | /* |
||
| 50 | * Registers 8-15 will automatically issue the Point High |
||
| 51 | * command as their bit 3 is 1. |
||
| 52 | */ |
||
| 4094 | decky | 53 | pio_write_8(ctl, reg); /* Select register */ |
| 54 | pio_write_8(ctl, val); /* Write value */ |
||
| 3961 | jermar | 55 | } |
| 56 | |||
| 57 | static inline uint8_t z8530_read(ioport8_t *ctl, uint8_t reg) |
||
| 58 | { |
||
| 59 | /* |
||
| 60 | * Registers 8-15 will automatically issue the Point High |
||
| 61 | * command as their bit 3 is 1. |
||
| 62 | */ |
||
| 4094 | decky | 63 | pio_write_8(ctl, reg); /* Select register */ |
| 3961 | jermar | 64 | return pio_read_8(ctl); |
| 65 | } |
||
| 66 | |||
| 4094 | decky | 67 | static irq_ownership_t z8530_claim(irq_t *irq) |
| 68 | { |
||
| 69 | z8530_instance_t *instance = irq->instance; |
||
| 70 | z8530_t *dev = instance->z8530; |
||
| 71 | |||
| 72 | if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) |
||
| 73 | return IRQ_ACCEPT; |
||
| 74 | else |
||
| 75 | return IRQ_DECLINE; |
||
| 76 | } |
||
| 77 | |||
| 78 | static void z8530_irq_handler(irq_t *irq) |
||
| 79 | { |
||
| 80 | z8530_instance_t *instance = irq->instance; |
||
| 81 | z8530_t *dev = instance->z8530; |
||
| 82 | |||
| 83 | if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) { |
||
| 84 | uint8_t x = z8530_read(&dev->ctl_a, RR8); |
||
| 85 | chardev_push_character(&instance->kbrdin, x); |
||
| 86 | } |
||
| 87 | } |
||
| 88 | |||
| 3961 | jermar | 89 | /** Initialize z8530. */ |
| 4094 | decky | 90 | indev_t *z8530_init(z8530_t *dev, devno_t devno, inr_t inr, cir_t cir, void *cir_arg) |
| 1 | jermar | 91 | { |
| 4094 | decky | 92 | z8530_instance_t *instance |
| 93 | = malloc(sizeof(z8530_instance_t), FRAME_ATOMIC); |
||
| 3961 | jermar | 94 | if (!instance) |
| 95 | return false; |
||
| 4094 | decky | 96 | |
| 97 | indev_initialize("z8530", &instance->kbrdin, &kbrdin_ops); |
||
| 98 | |||
| 3961 | jermar | 99 | instance->devno = devno; |
| 100 | instance->z8530 = dev; |
||
| 4094 | decky | 101 | |
| 3961 | jermar | 102 | irq_initialize(&instance->irq); |
| 103 | instance->irq.devno = devno; |
||
| 104 | instance->irq.inr = inr; |
||
| 105 | instance->irq.claim = z8530_claim; |
||
| 106 | instance->irq.handler = z8530_irq_handler; |
||
| 107 | instance->irq.instance = instance; |
||
| 108 | instance->irq.cir = cir; |
||
| 109 | instance->irq.cir_arg = cir_arg; |
||
| 110 | irq_register(&instance->irq); |
||
| 4094 | decky | 111 | |
| 3961 | jermar | 112 | (void) z8530_read(&dev->ctl_a, RR8); |
| 4094 | decky | 113 | |
| 1925 | jermar | 114 | /* |
| 115 | * Clear any pending TX interrupts or we never manage |
||
| 116 | * to set FHC UART interrupt state to idle. |
||
| 117 | */ |
||
| 3961 | jermar | 118 | z8530_write(&dev->ctl_a, WR0, WR0_TX_IP_RST); |
| 4094 | decky | 119 | |
| 3655 | jermar | 120 | /* interrupt on all characters */ |
| 3961 | jermar | 121 | z8530_write(&dev->ctl_a, WR1, WR1_IARCSC); |
| 4094 | decky | 122 | |
| 1925 | jermar | 123 | /* 8 bits per character and enable receiver */ |
| 3961 | jermar | 124 | z8530_write(&dev->ctl_a, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE); |
| 1925 | jermar | 125 | |
| 3655 | jermar | 126 | /* Master Interrupt Enable. */ |
| 3961 | jermar | 127 | z8530_write(&dev->ctl_a, WR9, WR9_MIE); |
| 4094 | decky | 128 | |
| 129 | return &instance->kbrdin; |
||
| 1 | jermar | 130 | } |
| 131 | |||
| 1754 | jermar | 132 | /** @} |
| 1702 | cejka | 133 | */ |