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1 | jermar | 1 | /* |
3982 | jermar | 2 | * Copyright (c) 2009 Jakub Jermar |
1 | jermar | 3 | * All rights reserved. |
4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
4094 | decky | 29 | /** @addtogroup genarch |
1702 | cejka | 30 | * @{ |
31 | */ |
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1754 | jermar | 32 | /** |
1757 | jermar | 33 | * @file |
4094 | decky | 34 | * @brief Zilog 8530 serial controller driver. |
1702 | cejka | 35 | */ |
36 | |||
4042 | jermar | 37 | #include <genarch/drivers/z8530/z8530.h> |
511 | jermar | 38 | #include <console/chardev.h> |
3961 | jermar | 39 | #include <ddi/irq.h> |
40 | #include <arch/asm.h> |
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41 | #include <mm/slab.h> |
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4148 | decky | 42 | #include <ddi/device.h> |
1 | jermar | 43 | |
3961 | jermar | 44 | static inline void z8530_write(ioport8_t *ctl, uint8_t reg, uint8_t val) |
45 | { |
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46 | /* |
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47 | * Registers 8-15 will automatically issue the Point High |
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48 | * command as their bit 3 is 1. |
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49 | */ |
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4094 | decky | 50 | pio_write_8(ctl, reg); /* Select register */ |
51 | pio_write_8(ctl, val); /* Write value */ |
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3961 | jermar | 52 | } |
53 | |||
54 | static inline uint8_t z8530_read(ioport8_t *ctl, uint8_t reg) |
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55 | { |
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56 | /* |
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57 | * Registers 8-15 will automatically issue the Point High |
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58 | * command as their bit 3 is 1. |
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59 | */ |
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4094 | decky | 60 | pio_write_8(ctl, reg); /* Select register */ |
3961 | jermar | 61 | return pio_read_8(ctl); |
62 | } |
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63 | |||
4094 | decky | 64 | static irq_ownership_t z8530_claim(irq_t *irq) |
65 | { |
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66 | z8530_instance_t *instance = irq->instance; |
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67 | z8530_t *dev = instance->z8530; |
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68 | |||
69 | if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) |
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70 | return IRQ_ACCEPT; |
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71 | else |
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72 | return IRQ_DECLINE; |
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73 | } |
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74 | |||
75 | static void z8530_irq_handler(irq_t *irq) |
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76 | { |
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77 | z8530_instance_t *instance = irq->instance; |
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78 | z8530_t *dev = instance->z8530; |
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79 | |||
80 | if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) { |
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4311 | decky | 81 | uint8_t data = z8530_read(&dev->ctl_a, RR8); |
82 | indev_push_character(instance->kbrdin, data); |
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4094 | decky | 83 | } |
84 | } |
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85 | |||
3961 | jermar | 86 | /** Initialize z8530. */ |
4311 | decky | 87 | z8530_instance_t *z8530_init(z8530_t *dev, inr_t inr, cir_t cir, void *cir_arg) |
1 | jermar | 88 | { |
4094 | decky | 89 | z8530_instance_t *instance |
90 | = malloc(sizeof(z8530_instance_t), FRAME_ATOMIC); |
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4311 | decky | 91 | if (instance) { |
92 | instance->z8530 = dev; |
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93 | instance->kbrdin = NULL; |
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94 | |||
95 | irq_initialize(&instance->irq); |
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96 | instance->irq.devno = device_assign_devno(); |
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97 | instance->irq.inr = inr; |
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98 | instance->irq.claim = z8530_claim; |
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99 | instance->irq.handler = z8530_irq_handler; |
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100 | instance->irq.instance = instance; |
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101 | instance->irq.cir = cir; |
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102 | instance->irq.cir_arg = cir_arg; |
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103 | } |
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4094 | decky | 104 | |
4311 | decky | 105 | return instance; |
106 | } |
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107 | |||
108 | void z8530_wire(z8530_instance_t *instance, indev_t *kbrdin) |
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109 | { |
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110 | ASSERT(instance); |
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111 | ASSERT(kbrdin); |
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4094 | decky | 112 | |
4311 | decky | 113 | instance->kbrdin = kbrdin; |
4094 | decky | 114 | |
3961 | jermar | 115 | irq_register(&instance->irq); |
4094 | decky | 116 | |
4311 | decky | 117 | (void) z8530_read(&instance->z8530->ctl_a, RR8); |
4094 | decky | 118 | |
1925 | jermar | 119 | /* |
120 | * Clear any pending TX interrupts or we never manage |
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121 | * to set FHC UART interrupt state to idle. |
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122 | */ |
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4311 | decky | 123 | z8530_write(&instance->z8530->ctl_a, WR0, WR0_TX_IP_RST); |
4094 | decky | 124 | |
3655 | jermar | 125 | /* interrupt on all characters */ |
4311 | decky | 126 | z8530_write(&instance->z8530->ctl_a, WR1, WR1_IARCSC); |
4094 | decky | 127 | |
1925 | jermar | 128 | /* 8 bits per character and enable receiver */ |
4311 | decky | 129 | z8530_write(&instance->z8530->ctl_a, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE); |
1925 | jermar | 130 | |
3655 | jermar | 131 | /* Master Interrupt Enable. */ |
4311 | decky | 132 | z8530_write(&instance->z8530->ctl_a, WR9, WR9_MIE); |
1 | jermar | 133 | } |
134 | |||
1754 | jermar | 135 | /** @} |
1702 | cejka | 136 | */ |