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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 1849 | jermar | 1 | /* |
| 2 | * Copyright (C) 2006 Jakub Jermar |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 29 | /** @addtogroup sparc64 |
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| 30 | * @{ |
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| 31 | */ |
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| 32 | /** |
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| 33 | * @file |
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| 34 | * @brief FireHose Controller (FHC) driver. |
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| 35 | * |
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| 36 | * Note that this driver is a result of reverse engineering |
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| 37 | * rather than implementation of a specification. This |
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| 38 | * is due to the fact that the FHC documentation is not |
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| 39 | * publicly available. |
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| 40 | */ |
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| 41 | |||
| 42 | #include <arch/drivers/fhc.h> |
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| 43 | #include <arch/mm/page.h> |
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| 1909 | jermar | 44 | #include <mm/slab.h> |
| 1849 | jermar | 45 | #include <arch/types.h> |
| 46 | #include <typedefs.h> |
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| 1909 | jermar | 47 | #include <genarch/ofw/ofw_tree.h> |
| 1849 | jermar | 48 | #include <genarch/kbd/z8530.h> |
| 49 | |||
| 1909 | jermar | 50 | fhc_t *central_fhc = NULL; |
| 1849 | jermar | 51 | |
| 1909 | jermar | 52 | /** |
| 53 | * I suspect this must be hardcoded in the FHC. |
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| 54 | * If it is not, than we can read all IMAP registers |
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| 55 | * and get the complete mapping. |
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| 56 | */ |
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| 1910 | jermar | 57 | #define FHC_UART_INR 0x39 |
| 1849 | jermar | 58 | |
| 59 | #define FHC_UART_IMAP 0x0 |
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| 60 | #define FHC_UART_ICLR 0x4 |
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| 61 | |||
| 1909 | jermar | 62 | #define UART_IMAP_REG 4 |
| 63 | |||
| 64 | fhc_t *fhc_init(ofw_tree_node_t *node) |
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| 1849 | jermar | 65 | { |
| 1909 | jermar | 66 | fhc_t *fhc; |
| 67 | ofw_tree_property_t *prop; |
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| 1849 | jermar | 68 | |
| 1909 | jermar | 69 | prop = ofw_tree_getprop(node, "reg"); |
| 70 | |||
| 71 | if (!prop || !prop->value) |
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| 72 | return NULL; |
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| 73 | |||
| 74 | count_t regs = prop->size / sizeof(ofw_central_reg_t); |
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| 75 | if (regs + 1 < UART_IMAP_REG) |
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| 76 | return NULL; |
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| 77 | |||
| 78 | ofw_central_reg_t *reg = &((ofw_central_reg_t *) prop->value)[UART_IMAP_REG]; |
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| 79 | |||
| 80 | uintptr_t paddr; |
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| 81 | if (!ofw_central_apply_ranges(node->parent, reg, &paddr)) |
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| 82 | return NULL; |
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| 83 | |||
| 84 | fhc = (fhc_t *) malloc(sizeof(fhc_t), FRAME_ATOMIC); |
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| 85 | if (!fhc) |
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| 86 | return NULL; |
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| 87 | |||
| 88 | fhc->uart_imap = (uint32_t *) hw_map(paddr, reg->size); |
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| 89 | |||
| 90 | return fhc; |
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| 1849 | jermar | 91 | } |
| 92 | |||
| 1910 | jermar | 93 | void fhc_enable_interrupt(fhc_t *fhc, int inr) |
| 1849 | jermar | 94 | { |
| 1910 | jermar | 95 | switch (inr) { |
| 96 | case FHC_UART_INR: |
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| 1909 | jermar | 97 | fhc->uart_imap[FHC_UART_ICLR] = 0x0; |
| 98 | fhc->uart_imap[FHC_UART_IMAP] = 0x80000000; |
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| 99 | break; |
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| 100 | default: |
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| 1910 | jermar | 101 | panic("Unexpected INR (%d)\n", inr); |
| 1909 | jermar | 102 | break; |
| 103 | } |
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| 1849 | jermar | 104 | } |
| 105 | |||
| 1910 | jermar | 106 | void fhc_clear_interrupt(fhc_t *fhc, int inr) |
| 1909 | jermar | 107 | { |
| 108 | ASSERT(fhc->uart_imap); |
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| 109 | |||
| 1910 | jermar | 110 | switch (inr) { |
| 111 | case FHC_UART_INR: |
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| 1909 | jermar | 112 | fhc->uart_imap[FHC_UART_ICLR] = 0; |
| 113 | break; |
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| 114 | default: |
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| 1910 | jermar | 115 | panic("Unexpected INR (%d)\n", inr); |
| 1909 | jermar | 116 | break; |
| 117 | } |
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| 118 | } |
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| 119 | |||
| 1849 | jermar | 120 | /** @} |
| 121 | */ |