WebSVN – HelenOS – Blame – /trunk/kernel/arch/ppc32/src/mm/tlb.c

Rev	Author	Line No.	Line
1215	decky	1	/*
2071	jermar	2	* Copyright (c) 2006 Martin Decky
1215	decky	3	* All rights reserved.
		4	*
		5	* Redistribution and use in source and binary forms, with or without
		6	* modification, are permitted provided that the following conditions
		7	* are met:
		8	*
		9	* - Redistributions of source code must retain the above copyright
		10	* notice, this list of conditions and the following disclaimer.
		11	* - Redistributions in binary form must reproduce the above copyright
		12	* notice, this list of conditions and the following disclaimer in the
		13	* documentation and/or other materials provided with the distribution.
		14	* - The name of the author may not be used to endorse or promote products
		15	* derived from this software without specific prior written permission.
		16	*
		17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
		18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
		19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
		20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
		21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
		22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
		23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
		24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
		25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
		26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
		27	*/
		28
3856	decky	29	/** @addtogroup ppc32mm
1702	cejka	30	* @{
		31	*/
		32	/** @file
		33	*/
		34
1215	decky	35	#include <mm/tlb.h>
1730	decky	36	#include <arch/mm/tlb.h>
		37	#include <arch/interrupt.h>
3594	svoboda	38	#include <interrupt.h>
1730	decky	39	#include <mm/as.h>
		40	#include <arch.h>
		41	#include <print.h>
		42	#include <symtab.h>
3838	decky	43	#include <macros.h>
1215	decky	44
		45
3837	decky	46	static unsigned int seed = 10;
		47	static unsigned int seed_real __attribute__ ((section("K_UNMAPPED_DATA_START"))) = 42;
		48
		49
3856	decky	50	#define TLB_FLUSH \
		51	"tlbie %0\n" \
		52	"addi %0, %0, 0x1000\n"
		53
		54
1730	decky	55	/** Try to find PTE for faulting address
1215	decky	56	*
1730	decky	57	* Try to find PTE for faulting address.
		58	* The as->lock must be held on entry to this function
		59	* if lock is true.
1215	decky	60	*
3193	jermar	61	* @param as Address space.
		62	* @param lock Lock/unlock the address space.
		63	* @param badvaddr Faulting virtual address.
		64	* @param access Access mode that caused the fault.
		65	* @param istate Pointer to interrupted state.
		66	* @param pfrc Pointer to variable where as_page_fault() return code
		67	* will be stored.
		68	* @return PTE on success, NULL otherwise.
1730	decky	69	*
1215	decky	70	*/
3193	jermar	71	static pte_t *
		72	find_mapping_and_check(as_t *as, bool lock, uintptr_t badvaddr, int access,
		73	istate_t istate, int pfrc)
1730	decky	74	{
		75	/*
		76	* Check if the mapping exists in page tables.
		77	*/
		78	pte_t *pte = page_mapping_find(as, badvaddr);
3830	decky	79	if ((pte) && (pte->present)) {
1730	decky	80	/*
		81	* Mapping found in page tables.
		82	* Immediately succeed.
		83	*/
		84	return pte;
		85	} else {
		86	int rc;
		87
		88	/*
		89	* Mapping not found in page tables.
		90	* Resort to higher-level page fault handler.
		91	*/
		92	page_table_unlock(as, lock);
		93	switch (rc = as_page_fault(badvaddr, access, istate)) {
3193	jermar	94	case AS_PF_OK:
		95	/*
		96	* The higher-level page fault handler succeeded,
		97	* The mapping ought to be in place.
		98	*/
		99	page_table_lock(as, lock);
		100	pte = page_mapping_find(as, badvaddr);
3830	decky	101	ASSERT((pte) && (pte->present));
3193	jermar	102	*pfrc = 0;
		103	return pte;
		104	case AS_PF_DEFER:
		105	page_table_lock(as, lock);
		106	*pfrc = rc;
		107	return NULL;
		108	case AS_PF_FAULT:
		109	page_table_lock(as, lock);
		110	*pfrc = rc;
		111	return NULL;
		112	default:
3790	svoboda	113	panic("Unexpected rc (%d).", rc);
1730	decky	114	}
		115	}
		116	}
		117
		118
1780	jermar	119	static void pht_refill_fail(uintptr_t badvaddr, istate_t *istate)
1730	decky	120	{
		121	char *symbol = "";
		122	char *sym2 = "";
		123
3833	decky	124	char *str = get_symtab_entry(istate->pc);
		125	if (str)
		126	symbol = str;
		127	str = get_symtab_entry(istate->lr);
		128	if (str)
		129	sym2 = str;
3594	svoboda	130
		131	fault_if_from_uspace(istate,
3833	decky	132	"PHT Refill Exception on %p.", badvaddr);
3790	svoboda	133	panic("%p: PHT Refill Exception at %p (%s<-%s).", badvaddr,
3193	jermar	134	istate->pc, symbol, sym2);
1730	decky	135	}
		136
		137
3830	decky	138	static void pht_insert(const uintptr_t vaddr, const pte_t *pte)
1730	decky	139	{
1780	jermar	140	uint32_t page = (vaddr >> 12) & 0xffff;
		141	uint32_t api = (vaddr >> 22) & 0x3f;
1730	decky	142
1780	jermar	143	uint32_t vsid;
1730	decky	144	asm volatile (
		145	"mfsrin %0, %1\n"
		146	: "=r" (vsid)
		147	: "r" (vaddr)
		148	);
		149
1780	jermar	150	uint32_t sdr1;
1730	decky	151	asm volatile (
		152	"mfsdr1 %0\n"
		153	: "=r" (sdr1)
		154	);
		155	phte_t phte = (phte_t ) PA2KA(sdr1 & 0xffff0000);
		156
		157	/* Primary hash (xor) */
1780	jermar	158	uint32_t h = 0;
		159	uint32_t hash = vsid ^ page;
		160	uint32_t base = (hash & 0x3ff) << 3;
		161	uint32_t i;
1730	decky	162	bool found = false;
		163
3839	decky	164	/* Find colliding PTE in PTEG */
1730	decky	165	for (i = 0; i < 8; i++) {
3839	decky	166	if ((phte[base + i].v)
		167	&& (phte[base + i].vsid == vsid)
3836	decky	168	&& (phte[base + i].api == api)
3839	decky	169	&& (phte[base + i].h == 0)) {
1730	decky	170	found = true;
		171	break;
		172	}
		173	}
		174
		175	if (!found) {
3839	decky	176	/* Find unused PTE in PTEG */
		177	for (i = 0; i < 8; i++) {
		178	if (!phte[base + i].v) {
		179	found = true;
		180	break;
		181	}
		182	}
		183	}
		184
		185	if (!found) {
1730	decky	186	/* Secondary hash (not) */
1780	jermar	187	uint32_t base2 = (~hash & 0x3ff) << 3;
1730	decky	188
3839	decky	189	/* Find colliding PTE in PTEG */
1730	decky	190	for (i = 0; i < 8; i++) {
3839	decky	191	if ((phte[base2 + i].v)
		192	&& (phte[base2 + i].vsid == vsid)
3836	decky	193	&& (phte[base2 + i].api == api)
3839	decky	194	&& (phte[base2 + i].h == 1)) {
1730	decky	195	found = true;
		196	base = base2;
		197	h = 1;
		198	break;
		199	}
		200	}
		201
3839	decky	202	if (!found) {
		203	/* Find unused PTE in PTEG */
		204	for (i = 0; i < 8; i++) {
		205	if (!phte[base2 + i].v) {
		206	found = true;
		207	base = base2;
		208	h = 1;
		209	break;
		210	}
		211	}
		212	}
		213
3836	decky	214	if (!found)
3837	decky	215	i = RANDI(seed) % 8;
1730	decky	216	}
		217
		218	phte[base + i].v = 1;
		219	phte[base + i].vsid = vsid;
		220	phte[base + i].h = h;
		221	phte[base + i].api = api;
3830	decky	222	phte[base + i].rpn = pte->pfn;
1730	decky	223	phte[base + i].r = 0;
		224	phte[base + i].c = 0;
3830	decky	225	phte[base + i].wimg = (pte->page_cache_disable ? WIMG_NO_CACHE : 0);
1730	decky	226	phte[base + i].pp = 2; // FIXME
		227	}
		228
		229
		230	/** Process Instruction/Data Storage Interrupt
		231	*
3193	jermar	232	* @param n Interrupt vector number.
		233	* @param istate Interrupted register context.
1730	decky	234	*
		235	*/
		236	void pht_refill(int n, istate_t *istate)
		237	{
1780	jermar	238	uintptr_t badvaddr;
1730	decky	239	pte_t *pte;
		240	int pfrc;
		241	as_t *as;
		242	bool lock;
		243
		244	if (AS == NULL) {
		245	as = AS_KERNEL;
		246	lock = false;
		247	} else {
		248	as = AS;
		249	lock = true;
		250	}
		251
3833	decky	252	if (n == VECTOR_DATA_STORAGE)
		253	badvaddr = istate->dar;
		254	else
1730	decky	255	badvaddr = istate->pc;
		256
		257	page_table_lock(as, lock);
		258
3193	jermar	259	pte = find_mapping_and_check(as, lock, badvaddr,
		260	PF_ACCESS_READ /* FIXME */, istate, &pfrc);
1730	decky	261	if (!pte) {
		262	switch (pfrc) {
3193	jermar	263	case AS_PF_FAULT:
		264	goto fail;
		265	break;
		266	case AS_PF_DEFER:
		267	/*
		268	* The page fault came during copy_from_uspace()
		269	* or copy_to_uspace().
		270	*/
		271	page_table_unlock(as, lock);
		272	return;
		273	default:
3790	svoboda	274	panic("Unexpected pfrc (%d).", pfrc);
1730	decky	275	}
		276	}
		277
3830	decky	278	pte->accessed = 1; /* Record access to PTE */
		279	pht_insert(badvaddr, pte);
1730	decky	280
		281	page_table_unlock(as, lock);
		282	return;
		283
		284	fail:
		285	page_table_unlock(as, lock);
		286	pht_refill_fail(badvaddr, istate);
		287	}
		288
		289
		290	/** Process Instruction/Data Storage Interrupt in Real Mode
		291	*
3193	jermar	292	* @param n Interrupt vector number.
		293	* @param istate Interrupted register context.
1730	decky	294	*
		295	*/
3837	decky	296	bool pht_refill_real(int n, istate_t *istate)
1730	decky	297	{
1780	jermar	298	uintptr_t badvaddr;
1730	decky	299
3833	decky	300	if (n == VECTOR_DATA_STORAGE)
		301	badvaddr = istate->dar;
		302	else
1730	decky	303	badvaddr = istate->pc;
		304
1780	jermar	305	uint32_t physmem;
1730	decky	306	asm volatile (
		307	"mfsprg3 %0\n"
		308	: "=r" (physmem)
		309	);
		310
3837	decky	311	if ((badvaddr < PA2KA(0)) \|\| (badvaddr >= PA2KA(physmem)))
		312	return false;
		313
		314	uint32_t page = (badvaddr >> 12) & 0xffff;
		315	uint32_t api = (badvaddr >> 22) & 0x3f;
		316
		317	uint32_t vsid;
		318	asm volatile (
		319	"mfsrin %0, %1\n"
		320	: "=r" (vsid)
		321	: "r" (badvaddr)
		322	);
		323
		324	uint32_t sdr1;
		325	asm volatile (
		326	"mfsdr1 %0\n"
		327	: "=r" (sdr1)
		328	);
		329	phte_t phte_real = (phte_t ) (sdr1 & 0xffff0000);
		330
		331	/* Primary hash (xor) */
		332	uint32_t h = 0;
		333	uint32_t hash = vsid ^ page;
		334	uint32_t base = (hash & 0x3ff) << 3;
		335	uint32_t i;
		336	bool found = false;
		337
3839	decky	338	/* Find colliding PTE in PTEG */
3837	decky	339	for (i = 0; i < 8; i++) {
3839	decky	340	if ((phte_real[base + i].v)
		341	&& (phte_real[base + i].vsid == vsid)
3837	decky	342	&& (phte_real[base + i].api == api)
3839	decky	343	&& (phte_real[base + i].h == 0)) {
3837	decky	344	found = true;
		345	break;
		346	}
1730	decky	347	}
		348
3837	decky	349	if (!found) {
3839	decky	350	/* Find unused PTE in PTEG */
		351	for (i = 0; i < 8; i++) {
		352	if (!phte_real[base + i].v) {
		353	found = true;
		354	break;
		355	}
		356	}
		357	}
		358
		359	if (!found) {
3837	decky	360	/* Secondary hash (not) */
		361	uint32_t base2 = (~hash & 0x3ff) << 3;
		362
3839	decky	363	/* Find colliding PTE in PTEG */
3837	decky	364	for (i = 0; i < 8; i++) {
3839	decky	365	if ((phte_real[base2 + i].v)
		366	&& (phte_real[base2 + i].vsid == vsid)
3837	decky	367	&& (phte_real[base2 + i].api == api)
3839	decky	368	&& (phte_real[base2 + i].h == 1)) {
3837	decky	369	found = true;
		370	base = base2;
		371	h = 1;
		372	break;
		373	}
		374	}
		375
		376	if (!found) {
3839	decky	377	/* Find unused PTE in PTEG */
		378	for (i = 0; i < 8; i++) {
		379	if (!phte_real[base2 + i].v) {
		380	found = true;
		381	base = base2;
		382	h = 1;
		383	break;
		384	}
		385	}
		386	}
		387
		388	if (!found) {
3837	decky	389	/* Use secondary hash to avoid collisions
		390	with usual PHT refill handler. */
		391	i = RANDI(seed_real) % 8;
		392	base = base2;
		393	h = 1;
		394	}
		395	}
		396
		397	phte_real[base + i].v = 1;
		398	phte_real[base + i].vsid = vsid;
		399	phte_real[base + i].h = h;
		400	phte_real[base + i].api = api;
		401	phte_real[base + i].rpn = KA2PA(badvaddr) >> 12;
		402	phte_real[base + i].r = 0;
		403	phte_real[base + i].c = 0;
		404	phte_real[base + i].wimg = 0;
		405	phte_real[base + i].pp = 2; // FIXME
		406
		407	return true;
1730	decky	408	}
		409
		410
1215	decky	411	void tlb_arch_init(void)
		412	{
1384	decky	413	tlb_invalidate_all();
		414	}
		415
		416
		417	void tlb_invalidate_all(void)
		418	{
3856	decky	419	uint32_t index;
1269	decky	420	asm volatile (
3856	decky	421	"li %0, 0\n"
		422	"sync\n"
		423
		424	TLB_FLUSH
		425	TLB_FLUSH
		426	TLB_FLUSH
		427	TLB_FLUSH
		428	TLB_FLUSH
		429	TLB_FLUSH
		430	TLB_FLUSH
		431	TLB_FLUSH
		432
		433	TLB_FLUSH
		434	TLB_FLUSH
		435	TLB_FLUSH
		436	TLB_FLUSH
		437	TLB_FLUSH
		438	TLB_FLUSH
		439	TLB_FLUSH
		440	TLB_FLUSH
		441
		442	TLB_FLUSH
		443	TLB_FLUSH
		444	TLB_FLUSH
		445	TLB_FLUSH
		446	TLB_FLUSH
		447	TLB_FLUSH
		448	TLB_FLUSH
		449	TLB_FLUSH
		450
		451	TLB_FLUSH
		452	TLB_FLUSH
		453	TLB_FLUSH
		454	TLB_FLUSH
		455	TLB_FLUSH
		456	TLB_FLUSH
		457	TLB_FLUSH
		458	TLB_FLUSH
		459
		460	TLB_FLUSH
		461	TLB_FLUSH
		462	TLB_FLUSH
		463	TLB_FLUSH
		464	TLB_FLUSH
		465	TLB_FLUSH
		466	TLB_FLUSH
		467	TLB_FLUSH
		468
		469	TLB_FLUSH
		470	TLB_FLUSH
		471	TLB_FLUSH
		472	TLB_FLUSH
		473	TLB_FLUSH
		474	TLB_FLUSH
		475	TLB_FLUSH
		476	TLB_FLUSH
		477
		478	TLB_FLUSH
		479	TLB_FLUSH
		480	TLB_FLUSH
		481	TLB_FLUSH
		482	TLB_FLUSH
		483	TLB_FLUSH
		484	TLB_FLUSH
		485	TLB_FLUSH
		486
		487	TLB_FLUSH
		488	TLB_FLUSH
		489	TLB_FLUSH
		490	TLB_FLUSH
		491	TLB_FLUSH
		492	TLB_FLUSH
		493	TLB_FLUSH
		494	TLB_FLUSH
		495
		496	"eieio\n"
1384	decky	497	"tlbsync\n"
3856	decky	498	"sync\n"
		499	: "=r" (index)
1269	decky	500	);
1215	decky	501	}
		502
		503
1384	decky	504	void tlb_invalidate_asid(asid_t asid)
1328	decky	505	{
1780	jermar	506	uint32_t sdr1;
1758	decky	507	asm volatile (
		508	"mfsdr1 %0\n"
		509	: "=r" (sdr1)
		510	);
		511	phte_t phte = (phte_t ) PA2KA(sdr1 & 0xffff0000);
		512
1780	jermar	513	uint32_t i;
1758	decky	514	for (i = 0; i < 8192; i++) {
3193	jermar	515	if ((phte[i].v) && (phte[i].vsid >= (asid << 4)) &&
		516	(phte[i].vsid < ((asid << 4) + 16)))
1758	decky	517	phte[i].v = 0;
		518	}
1384	decky	519	tlb_invalidate_all();
1328	decky	520	}
		521
1730	decky	522
1780	jermar	523	void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
1384	decky	524	{
1730	decky	525	// TODO
1384	decky	526	tlb_invalidate_all();
		527	}
1328	decky	528
1384	decky	529
1736	decky	530	#define PRINT_BAT(name, ureg, lreg) \
		531	asm volatile ( \
		532	"mfspr %0," #ureg "\n" \
		533	"mfspr %1," #lreg "\n" \
		534	: "=r" (upper), "=r" (lower) \
		535	); \
		536	mask = (upper & 0x1ffc) >> 2; \
		537	if (upper & 3) { \
1780	jermar	538	uint32_t tmp = mask; \
1736	decky	539	length = 128; \
		540	while (tmp) { \
		541	if ((tmp & 1) == 0) { \
		542	printf("ibat[0]: error in mask\n"); \
		543	break; \
		544	} \
		545	length <<= 1; \
		546	tmp >>= 1; \
		547	} \
		548	} else \
		549	length = 0; \
3193	jermar	550	printf(name ": page=%.p frame=%.p length=%d KB (mask=%#x)%s%s\n", \
		551	sizeof(upper) * 2, upper & 0xffff0000, sizeof(lower) * 2, \
		552	lower & 0xffff0000, length, mask, \
		553	((upper >> 1) & 1) ? " supervisor" : "", \
		554	(upper & 1) ? " user" : "");
1736	decky	555
		556
1215	decky	557	void tlb_print(void)
		558	{
1780	jermar	559	uint32_t sr;
1733	decky	560
		561	for (sr = 0; sr < 16; sr++) {
1780	jermar	562	uint32_t vsid;
1733	decky	563	asm volatile (
		564	"mfsrin %0, %1\n"
		565	: "=r" (vsid)
		566	: "r" (sr << 28)
		567	);
3837	decky	568	printf("sr[%02u]: vsid=%.*p (asid=%u)%s%s\n", sr,
3193	jermar	569	sizeof(vsid) * 2, vsid & 0xffffff, (vsid & 0xffffff) >> 4,
		570	((vsid >> 30) & 1) ? " supervisor" : "",
		571	((vsid >> 29) & 1) ? " user" : "");
1733	decky	572	}
1736	decky	573
1780	jermar	574	uint32_t upper;
		575	uint32_t lower;
		576	uint32_t mask;
		577	uint32_t length;
1736	decky	578
		579	PRINT_BAT("ibat[0]", 528, 529);
		580	PRINT_BAT("ibat[1]", 530, 531);
		581	PRINT_BAT("ibat[2]", 532, 533);
		582	PRINT_BAT("ibat[3]", 534, 535);
		583
		584	PRINT_BAT("dbat[0]", 536, 537);
		585	PRINT_BAT("dbat[1]", 538, 539);
		586	PRINT_BAT("dbat[2]", 540, 541);
		587	PRINT_BAT("dbat[3]", 542, 543);
1215	decky	588	}
1702	cejka	589
1730	decky	590	/** @}
1702	cejka	591	*/

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/ppc32/src/mm/tlb.c – Rev 3856