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| Rev | Author | Line No. | Line |
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| 1 | jermar | 1 | /* |
| 319 | jermar | 2 | * Copyright (C) 2003-2004 Jakub Jermar |
| 1 | jermar | 3 | * All rights reserved. |
| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 1881 | jermar | 29 | /** @addtogroup mips32interrupt |
| 1702 | cejka | 30 | * @{ |
| 31 | */ |
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| 32 | /** @file |
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| 33 | */ |
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| 34 | |||
| 575 | palkovsky | 35 | #include <interrupt.h> |
| 1 | jermar | 36 | #include <arch/interrupt.h> |
| 37 | #include <arch/types.h> |
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| 38 | #include <arch.h> |
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| 39 | #include <arch/cp0.h> |
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| 40 | #include <time/clock.h> |
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| 332 | palkovsky | 41 | #include <arch/drivers/arc.h> |
| 1258 | palkovsky | 42 | #include <ipc/sysipc.h> |
| 1936 | decky | 43 | #include <ddi/device.h> |
| 44 | #include <ddi/irq.h> |
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| 1258 | palkovsky | 45 | |
| 1936 | decky | 46 | #define IRQ_COUNT 8 |
| 47 | #define TIMER_IRQ 7 |
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| 48 | |||
| 1955 | decky | 49 | function virtual_timer_fnc = NULL; |
| 1936 | decky | 50 | static irq_t timer_irq; |
| 51 | |||
| 413 | jermar | 52 | /** Disable interrupts. |
| 53 | * |
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| 54 | * @return Old interrupt priority level. |
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| 55 | */ |
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| 56 | ipl_t interrupts_disable(void) |
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| 1 | jermar | 57 | { |
| 413 | jermar | 58 | ipl_t ipl = (ipl_t) cp0_status_read(); |
| 59 | cp0_status_write(ipl & ~cp0_status_ie_enabled_bit); |
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| 60 | return ipl; |
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| 1 | jermar | 61 | } |
| 62 | |||
| 413 | jermar | 63 | /** Enable interrupts. |
| 64 | * |
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| 65 | * @return Old interrupt priority level. |
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| 66 | */ |
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| 67 | ipl_t interrupts_enable(void) |
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| 1 | jermar | 68 | { |
| 413 | jermar | 69 | ipl_t ipl = (ipl_t) cp0_status_read(); |
| 70 | cp0_status_write(ipl | cp0_status_ie_enabled_bit); |
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| 71 | return ipl; |
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| 1 | jermar | 72 | } |
| 73 | |||
| 413 | jermar | 74 | /** Restore interrupt priority level. |
| 75 | * |
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| 76 | * @param ipl Saved interrupt priority level. |
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| 77 | */ |
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| 78 | void interrupts_restore(ipl_t ipl) |
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| 1 | jermar | 79 | { |
| 413 | jermar | 80 | cp0_status_write(cp0_status_read() | (ipl & cp0_status_ie_enabled_bit)); |
| 1 | jermar | 81 | } |
| 82 | |||
| 413 | jermar | 83 | /** Read interrupt priority level. |
| 84 | * |
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| 85 | * @return Current interrupt priority level. |
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| 86 | */ |
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| 87 | ipl_t interrupts_read(void) |
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| 1 | jermar | 88 | { |
| 125 | jermar | 89 | return cp0_status_read(); |
| 1 | jermar | 90 | } |
| 91 | |||
| 1434 | palkovsky | 92 | /* TODO: This is SMP unsafe!!! */ |
| 93 | static unsigned long nextcount; |
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| 94 | /** Start hardware clock */ |
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| 95 | static void timer_start(void) |
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| 96 | { |
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| 97 | nextcount = cp0_compare_value + cp0_count_read(); |
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| 98 | cp0_compare_write(nextcount); |
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| 99 | } |
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| 100 | |||
| 1936 | decky | 101 | static irq_ownership_t timer_claim(void) |
| 575 | palkovsky | 102 | { |
| 1936 | decky | 103 | return IRQ_ACCEPT; |
| 104 | } |
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| 105 | |||
| 106 | static void timer_irq_handler(irq_t *irq, void *arg, ...) |
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| 107 | { |
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| 1434 | palkovsky | 108 | unsigned long drift; |
| 109 | |||
| 110 | drift = cp0_count_read() - nextcount; |
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| 111 | while (drift > cp0_compare_value) { |
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| 112 | drift -= cp0_compare_value; |
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| 113 | CPU->missed_clock_ticks++; |
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| 114 | } |
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| 115 | nextcount = cp0_count_read() + cp0_compare_value - drift; |
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| 116 | cp0_compare_write(nextcount); |
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| 575 | palkovsky | 117 | clock(); |
| 1936 | decky | 118 | |
| 1955 | decky | 119 | if (virtual_timer_fnc != NULL) |
| 120 | virtual_timer_fnc(); |
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| 575 | palkovsky | 121 | } |
| 122 | |||
| 123 | /* Initialize basic tables for exception dispatching */ |
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| 124 | void interrupt_init(void) |
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| 125 | { |
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| 1936 | decky | 126 | irq_init(IRQ_COUNT, IRQ_COUNT); |
| 127 | |||
| 128 | irq_initialize(&timer_irq); |
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| 129 | timer_irq.devno = device_assign_devno(); |
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| 130 | timer_irq.inr = TIMER_IRQ; |
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| 131 | timer_irq.claim = timer_claim; |
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| 132 | timer_irq.handler = timer_irq_handler; |
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| 133 | irq_register(&timer_irq); |
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| 134 | |||
| 1434 | palkovsky | 135 | timer_start(); |
| 1936 | decky | 136 | cp0_unmask_int(TIMER_IRQ); |
| 1 | jermar | 137 | } |
| 1258 | palkovsky | 138 | |
| 1881 | jermar | 139 | /** @} |
| 1702 | cejka | 140 | */ |