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431 | jermar | 1 | /* |
2071 | jermar | 2 | * Copyright (c) 2005 Jakub Jermar |
3 | * Copyright (c) 2005 Jakub Vana |
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431 | jermar | 4 | * All rights reserved. |
5 | * |
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6 | * Redistribution and use in source and binary forms, with or without |
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7 | * modification, are permitted provided that the following conditions |
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8 | * are met: |
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9 | * |
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10 | * - Redistributions of source code must retain the above copyright |
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11 | * notice, this list of conditions and the following disclaimer. |
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12 | * - Redistributions in binary form must reproduce the above copyright |
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13 | * notice, this list of conditions and the following disclaimer in the |
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14 | * documentation and/or other materials provided with the distribution. |
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15 | * - The name of the author may not be used to endorse or promote products |
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16 | * derived from this software without specific prior written permission. |
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17 | * |
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18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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1702 | cejka | 28 | */ |
29 | |||
1705 | cejka | 30 | /** @addtogroup ia64interrupt |
1702 | cejka | 31 | * @{ |
32 | */ |
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33 | /** @file |
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431 | jermar | 34 | */ |
35 | |||
36 | #include <arch/interrupt.h> |
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1942 | jermar | 37 | #include <interrupt.h> |
38 | #include <ddi/irq.h> |
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431 | jermar | 39 | #include <panic.h> |
433 | jermar | 40 | #include <print.h> |
1942 | jermar | 41 | #include <symtab.h> |
42 | #include <debug.h> |
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583 | jermar | 43 | #include <console/console.h> |
431 | jermar | 44 | #include <arch/types.h> |
45 | #include <arch/asm.h> |
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46 | #include <arch/barrier.h> |
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432 | jermar | 47 | #include <arch/register.h> |
433 | jermar | 48 | #include <arch.h> |
921 | jermar | 49 | #include <syscall/syscall.h> |
50 | #include <print.h> |
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1023 | vana | 51 | #include <proc/scheduler.h> |
1265 | jermar | 52 | #include <ipc/sysipc.h> |
1507 | vana | 53 | #include <ipc/irq.h> |
54 | #include <ipc/ipc.h> |
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1942 | jermar | 55 | #include <synch/spinlock.h> |
431 | jermar | 56 | |
470 | jermar | 57 | #define VECTORS_64_BUNDLE 20 |
58 | #define VECTORS_16_BUNDLE 48 |
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59 | #define VECTORS_16_BUNDLE_START 0x5000 |
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60 | #define VECTOR_MAX 0x7f00 |
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61 | |||
62 | #define BUNDLE_SIZE 16 |
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63 | |||
64 | char *vector_names_64_bundle[VECTORS_64_BUNDLE] = { |
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65 | "VHPT Translation vector", |
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66 | "Instruction TLB vector", |
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67 | "Data TLB vector", |
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68 | "Alternate Instruction TLB vector", |
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69 | "Alternate Data TLB vector", |
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70 | "Data Nested TLB vector", |
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71 | "Instruction Key Miss vector", |
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72 | "Data Key Miss vector", |
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73 | "Dirty-Bit vector", |
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74 | "Instruction Access-Bit vector", |
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75 | "Data Access-Bit vector" |
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76 | "Break Instruction vector", |
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77 | "External Interrupt vector" |
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78 | "Reserved", |
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79 | "Reserved", |
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80 | "Reserved", |
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81 | "Reserved", |
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82 | "Reserved", |
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83 | "Reserved", |
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84 | "Reserved" |
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85 | }; |
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86 | |||
87 | char *vector_names_16_bundle[VECTORS_16_BUNDLE] = { |
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88 | "Page Not Present vector", |
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89 | "Key Permission vector", |
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90 | "Instruction Access rights vector", |
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91 | "Data Access Rights vector", |
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92 | "General Exception vector", |
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93 | "Disabled FP-Register vector", |
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94 | "NaT Consumption vector", |
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95 | "Speculation vector", |
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96 | "Reserved", |
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97 | "Debug vector", |
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98 | "Unaligned Reference vector", |
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99 | "Unsupported Data Reference vector", |
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100 | "Floating-point Fault vector", |
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101 | "Floating-point Trap vector", |
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102 | "Lower-Privilege Transfer Trap vector", |
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103 | "Taken Branch Trap vector", |
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2060 | jermar | 104 | "Single Step Trap vector", |
470 | jermar | 105 | "Reserved", |
106 | "Reserved", |
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107 | "Reserved", |
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108 | "Reserved", |
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109 | "Reserved", |
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110 | "Reserved", |
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111 | "Reserved", |
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112 | "Reserved", |
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113 | "IA-32 Exception vector", |
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114 | "IA-32 Intercept vector", |
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115 | "IA-32 Interrupt vector", |
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116 | "Reserved", |
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117 | "Reserved", |
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118 | "Reserved" |
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119 | }; |
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120 | |||
1780 | jermar | 121 | static char *vector_to_string(uint16_t vector); |
958 | jermar | 122 | static void dump_interrupted_context(istate_t *istate); |
470 | jermar | 123 | |
1780 | jermar | 124 | char *vector_to_string(uint16_t vector) |
431 | jermar | 125 | { |
470 | jermar | 126 | ASSERT(vector <= VECTOR_MAX); |
127 | |||
128 | if (vector >= VECTORS_16_BUNDLE_START) |
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129 | return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)]; |
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130 | else |
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131 | return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)]; |
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132 | } |
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133 | |||
958 | jermar | 134 | void dump_interrupted_context(istate_t *istate) |
470 | jermar | 135 | { |
136 | char *ifa, *iipa, *iip; |
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137 | |||
958 | jermar | 138 | ifa = get_symtab_entry(istate->cr_ifa); |
139 | iipa = get_symtab_entry(istate->cr_iipa); |
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140 | iip = get_symtab_entry(istate->cr_iip); |
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470 | jermar | 141 | |
142 | putchar('\n'); |
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472 | jermar | 143 | printf("Interrupted context dump:\n"); |
1221 | decky | 144 | printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp, istate->ar_bspstore); |
1507 | vana | 145 | printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat, istate->ar_rsc); |
146 | printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs, istate->ar_pfs); |
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147 | printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value, istate->cr_ipsr); |
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470 | jermar | 148 | |
1507 | vana | 149 | printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei, iip); |
150 | printf("cr.iipa=%#018llx\t(%s)\n", istate->cr_iipa, iipa); |
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151 | printf("cr.ifa=%#018llx\t(%s)\n", istate->cr_ifa, ifa); |
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470 | jermar | 152 | } |
153 | |||
1780 | jermar | 154 | void general_exception(uint64_t vector, istate_t *istate) |
470 | jermar | 155 | { |
472 | jermar | 156 | char *desc = ""; |
157 | |||
958 | jermar | 158 | switch (istate->cr_isr.ge_code) { |
1882 | jermar | 159 | case GE_ILLEGALOP: |
472 | jermar | 160 | desc = "Illegal Operation fault"; |
161 | break; |
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1882 | jermar | 162 | case GE_PRIVOP: |
472 | jermar | 163 | desc = "Privileged Operation fault"; |
164 | break; |
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1882 | jermar | 165 | case GE_PRIVREG: |
472 | jermar | 166 | desc = "Privileged Register fault"; |
167 | break; |
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1882 | jermar | 168 | case GE_RESREGFLD: |
472 | jermar | 169 | desc = "Reserved Register/Field fault"; |
170 | break; |
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1882 | jermar | 171 | case GE_DISBLDISTRAN: |
472 | jermar | 172 | desc = "Disabled Instruction Set Transition fault"; |
173 | break; |
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1882 | jermar | 174 | case GE_ILLEGALDEP: |
472 | jermar | 175 | desc = "Illegal Dependency fault"; |
176 | break; |
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1882 | jermar | 177 | default: |
178 | desc = "unknown"; |
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472 | jermar | 179 | break; |
180 | } |
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181 | |||
1595 | palkovsky | 182 | fault_if_from_uspace(istate, "General Exception (%s)", desc); |
183 | |||
184 | dump_interrupted_context(istate); |
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472 | jermar | 185 | panic("General Exception (%s)\n", desc); |
470 | jermar | 186 | } |
187 | |||
1780 | jermar | 188 | void disabled_fp_register(uint64_t vector, istate_t *istate) |
1023 | vana | 189 | { |
1053 | vana | 190 | #ifdef CONFIG_FPU_LAZY |
1023 | vana | 191 | scheduler_fpu_lazy_request(); |
1053 | vana | 192 | #else |
1780 | jermar | 193 | fault_if_from_uspace(istate, "Interruption: %#hx (%s)", (uint16_t) vector, vector_to_string(vector)); |
1053 | vana | 194 | dump_interrupted_context(istate); |
1780 | jermar | 195 | panic("Interruption: %#hx (%s)\n", (uint16_t) vector, vector_to_string(vector)); |
1023 | vana | 196 | #endif |
197 | } |
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198 | |||
1780 | jermar | 199 | void nop_handler(uint64_t vector, istate_t *istate) |
1023 | vana | 200 | { |
201 | } |
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202 | |||
921 | jermar | 203 | /** Handle syscall. */ |
1780 | jermar | 204 | int break_instruction(uint64_t vector, istate_t *istate) |
470 | jermar | 205 | { |
921 | jermar | 206 | /* |
207 | * Move to next instruction after BREAK. |
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208 | */ |
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958 | jermar | 209 | if (istate->cr_ipsr.ri == 2) { |
210 | istate->cr_ipsr.ri = 0; |
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211 | istate->cr_iip += 16; |
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921 | jermar | 212 | } else { |
958 | jermar | 213 | istate->cr_ipsr.ri++; |
921 | jermar | 214 | } |
215 | |||
1888 | jermar | 216 | return syscall_handler(istate->in0, istate->in1, istate->in2, istate->in3, istate->in4); |
470 | jermar | 217 | } |
218 | |||
1780 | jermar | 219 | void universal_handler(uint64_t vector, istate_t *istate) |
470 | jermar | 220 | { |
1780 | jermar | 221 | fault_if_from_uspace(istate,"Interruption: %#hx (%s)\n",(uint16_t) vector, vector_to_string(vector)); |
958 | jermar | 222 | dump_interrupted_context(istate); |
1780 | jermar | 223 | panic("Interruption: %#hx (%s)\n", (uint16_t) vector, vector_to_string(vector)); |
470 | jermar | 224 | } |
225 | |||
1780 | jermar | 226 | void external_interrupt(uint64_t vector, istate_t *istate) |
470 | jermar | 227 | { |
1942 | jermar | 228 | irq_t *irq; |
433 | jermar | 229 | cr_ivr_t ivr; |
431 | jermar | 230 | |
433 | jermar | 231 | ivr.value = ivr_read(); |
431 | jermar | 232 | srlz_d(); |
444 | vana | 233 | |
1942 | jermar | 234 | irq = irq_dispatch_and_lock(ivr.vector); |
235 | if (irq) { |
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236 | irq->handler(irq, irq->arg); |
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237 | spinlock_unlock(&irq->lock); |
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238 | } else { |
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239 | switch (ivr.vector) { |
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240 | case INTERRUPT_SPURIOUS: |
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241 | #ifdef CONFIG_DEBUG |
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242 | printf("cpu%d: spurious interrupt\n", CPU->id); |
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243 | #endif |
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244 | break; |
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1265 | jermar | 245 | |
1942 | jermar | 246 | default: |
247 | panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector); |
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248 | break; |
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249 | } |
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1507 | vana | 250 | } |
251 | } |
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252 | |||
1703 | jermar | 253 | /** @} |
1702 | cejka | 254 | */ |