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Rev | Author | Line No. | Line |
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435 | jermar | 1 | /* |
2071 | jermar | 2 | * Copyright (c) 2005 Jakub Jermar |
435 | jermar | 3 | * All rights reserved. |
4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
4148 | decky | 29 | /** @addtogroup ia64 |
1702 | cejka | 30 | * @{ |
31 | */ |
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32 | /** @file |
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33 | */ |
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34 | |||
435 | jermar | 35 | /** Interval Timer driver. */ |
36 | |||
37 | #include <arch/drivers/it.h> |
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38 | #include <arch/interrupt.h> |
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39 | #include <arch/register.h> |
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40 | #include <arch/asm.h> |
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41 | #include <arch/barrier.h> |
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42 | #include <time/clock.h> |
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1942 | jermar | 43 | #include <ddi/irq.h> |
44 | #include <ddi/device.h> |
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1482 | vana | 45 | #include <arch.h> |
435 | jermar | 46 | |
3766 | jermar | 47 | #define IT_SERVICE_CLOCKS 64 |
1482 | vana | 48 | |
3766 | jermar | 49 | #define FREQ_NUMERATOR_SHIFT 32 |
50 | #define FREQ_NUMERATOR_MASK 0xffffffff00000000ULL |
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3583 | vana | 51 | |
3766 | jermar | 52 | #define FREQ_DENOMINATOR_SHIFT 0 |
53 | #define FREQ_DENOMINATOR_MASK 0xffffffffULL |
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3583 | vana | 54 | |
55 | uint64_t it_delta; |
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56 | |||
1942 | jermar | 57 | static irq_t it_irq; |
58 | |||
3941 | jermar | 59 | static irq_ownership_t it_claim(irq_t *); |
60 | static void it_interrupt(irq_t *); |
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1942 | jermar | 61 | |
435 | jermar | 62 | /** Initialize Interval Timer. */ |
63 | void it_init(void) |
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64 | { |
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65 | cr_itv_t itv; |
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3578 | vana | 66 | |
3766 | jermar | 67 | if (config.cpu_active == 1) { |
3578 | vana | 68 | irq_initialize(&it_irq); |
69 | it_irq.inr = INTERRUPT_TIMER; |
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70 | it_irq.devno = device_assign_devno(); |
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71 | it_irq.claim = it_claim; |
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72 | it_irq.handler = it_interrupt; |
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73 | irq_register(&it_irq); |
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3583 | vana | 74 | |
75 | uint64_t base_freq; |
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3766 | jermar | 76 | base_freq = ((bootinfo->freq_scale) & FREQ_NUMERATOR_MASK) >> |
77 | FREQ_NUMERATOR_SHIFT; |
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3583 | vana | 78 | base_freq *= bootinfo->sys_freq; |
3766 | jermar | 79 | base_freq /= ((bootinfo->freq_scale) & FREQ_DENOMINATOR_MASK) >> |
80 | FREQ_DENOMINATOR_SHIFT; |
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3583 | vana | 81 | |
3766 | jermar | 82 | it_delta = base_freq / HZ; |
3578 | vana | 83 | } |
84 | |||
435 | jermar | 85 | /* initialize Interval Timer external interrupt vector */ |
86 | itv.value = itv_read(); |
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87 | itv.vector = INTERRUPT_TIMER; |
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88 | itv.m = 0; |
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89 | itv_write(itv.value); |
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90 | |||
91 | /* set Interval Timer Counter to zero */ |
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92 | itc_write(0); |
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93 | |||
94 | /* generate first Interval Timer interrupt in IT_DELTA ticks */ |
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95 | itm_write(IT_DELTA); |
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456 | jermar | 96 | |
97 | /* propagate changes */ |
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435 | jermar | 98 | srlz_d(); |
99 | } |
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100 | |||
1942 | jermar | 101 | /** Always claim ownership for this IRQ. |
102 | * |
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103 | * Other devices are responsible to avoid using INR 0. |
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104 | * |
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105 | * @return Always IRQ_ACCEPT. |
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106 | */ |
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3941 | jermar | 107 | irq_ownership_t it_claim(irq_t *irq) |
1942 | jermar | 108 | { |
109 | return IRQ_ACCEPT; |
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110 | } |
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1482 | vana | 111 | |
435 | jermar | 112 | /** Process Interval Timer interrupt. */ |
3906 | jermar | 113 | void it_interrupt(irq_t *irq) |
435 | jermar | 114 | { |
1780 | jermar | 115 | int64_t c; |
116 | int64_t m; |
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1482 | vana | 117 | |
435 | jermar | 118 | eoi_write(EOI); |
1482 | vana | 119 | |
1881 | jermar | 120 | m = itm_read(); |
1482 | vana | 121 | |
1881 | jermar | 122 | while (1) { |
123 | c = itc_read(); |
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124 | c += IT_SERVICE_CLOCKS; |
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1482 | vana | 125 | |
1881 | jermar | 126 | m += IT_DELTA; |
1942 | jermar | 127 | if (m - c < 0) |
1482 | vana | 128 | CPU->missed_clock_ticks++; |
1881 | jermar | 129 | else |
130 | break; |
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1482 | vana | 131 | } |
132 | |||
133 | itm_write(m); |
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456 | jermar | 134 | srlz_d(); /* propagate changes */ |
2107 | jermar | 135 | |
136 | /* |
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137 | * We are holding a lock which prevents preemption. |
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138 | * Release the lock, call clock() and reacquire the lock again. |
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139 | */ |
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140 | spinlock_unlock(&irq->lock); |
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435 | jermar | 141 | clock(); |
2107 | jermar | 142 | spinlock_lock(&irq->lock); |
435 | jermar | 143 | } |
1702 | cejka | 144 | |
1881 | jermar | 145 | /** @} |
1702 | cejka | 146 | */ |